Allan Hartstein

According to our database1, Allan Hartstein authored at least 16 papers between 1988 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2014
3D stacking of high-performance processors.
Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2008
Analyzing the Cost of a Cache Miss Using Pipeline Spectroscopy.
J. Instr. Level Parallelism, 2008

On the Nature of Cache Miss Behavior: Is It √2?
J. Instr. Level Parallelism, 2008

2007
Pipeline spectroscopy.
Proceedings of the Workshop on Experimental Computer Science, 2007

An analysis of the effects of miss clustering on the cost of a cache miss.
Proceedings of the 4th Conference on Computing Frontiers, 2007

2006
Cache miss behavior: is it sqrt(2)?
Proceedings of the Third Conference on Computing Frontiers, 2006

2005
Exploring the limits of prefetching.
IBM J. Res. Dev., 2005

When prefetching improves/degrades performance.
Proceedings of the Second Conference on Computing Frontiers, 2005

2004
The optimum pipeline depth considering both power and performance.
ACM Trans. Archit. Code Optim., 2004

2003
Optimum Power/Performance Pipeline Depth.
Proceedings of the 36th Annual International Symposium on Microarchitecture, 2003

2002
The Optimum Pipeline Depth for a Microprocessor.
Proceedings of the 29th International Symposium on Computer Architecture (ISCA 2002), 2002

1991
A Backpropagation Algorithm for a Network of Neurons with Threshold Controlled Synapses.
Int. J. Neural Syst., 1991

1990
Reply.
Neural Networks, 1990

1989
A neural network capable of forming associations by example.
Neural Networks, 1989

1988
A Self-Learning Neural Network.
Proceedings of the Advances in Neural Information Processing Systems 1, 1988

A self-learning threshold-controlled neural network.
Proceedings of International Conference on Neural Networks (ICNN'88), 1988


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