Alireza Sharif Bakhtiar
Orcid: 0000-0001-5599-9622
According to our database1,
Alireza Sharif Bakhtiar
authored at least 10 papers
between 2010 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2023
A 112-Gb/s - 8.2-dBm Sensitivity 4-PAM Linear TIA in 16-nm CMOS With Co-Packaged Photodiodes.
IEEE J. Solid State Circuits, March, 2023
2022
A 112 Gb/s -8.2 dBm Sensitivity 4-PAM Linear TIA in 16nm CMOS with Co-Packaged Photodiodes.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2022
2019
A 1.41pJ/b 56Gb/s PAM-4 Wireline Receiver Employing Enhanced Pattern Utilization CDR and Genetic Adaptation Algorithms in 7nm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
2017
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017
2016
A 20 Gb/s CMOS Optical Receiver With Limited-Bandwidth Front End and Local Feedback IIR-DFE.
IEEE J. Solid State Circuits, 2016
2015
Proceedings of the Symposium on VLSI Circuits, 2015
2013
A 0.007-mmy<sup>2</sup> 108-ppm°C 1-MHz Relaxation Oscillator for High-Temperature Applications up to 180°C in 0.13-µm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2013
2011
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011
2010
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010