Alireza Asadi

Orcid: 0009-0008-1105-9901

According to our database1, Alireza Asadi authored at least 10 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2024
Predicting the Understandability of Computational Notebooks through Code Metrics Analysis.
CoRR, 2024

Beyond Syntax: Unleashing the Power of Computational Notebooks Code Metrics in Documentation Generation.
Proceedings of the IEEE/ACM 3rd International Conference on AI Engineering, 2024

A Roadmap for Enriching Jupyter Notebooks Documentation with Kaggle Data.
Proceedings of the IEEE/ACM 3rd International Conference on AI Engineering, 2024

2023
An ultra-low power and energy-efficient ternary Half-Adder based on unary operators and two ternary 3:1 multiplexers in 32-nm GNRFET technology.
Int. J. Circuit Theory Appl., October, 2023

A Novel Control Approach for a Single-Inductor Multi-Input Single-Output DC-DC Boost Converter for PV Applications.
IEEE Access, 2023

A Soft-Switched Step-Up Non-isolated Zeta-Flyback Converter for Solar PV Applications.
Proceedings of the IEEE Canadian Conference on Electrical and Computer Engineering, 2023

2020
Multi-exposure image fusion via a pyramidal integration of the phase congruency of input images with the intensity-based maps.
IET Image Process., 2020

2016
Infeasible Interior-Point Methods for Linear Optimization Based on Large Neighborhood.
J. Optim. Theory Appl., 2016

2010
Convergence of the homotopy path for a full-Newton step infeasible interior-point method.
Oper. Res. Lett., 2010

2006
A 1.8V, 10-bit, 40MS/s MOSFET-only pipeline analog-to-digital converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006


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