Alik Zelichenok

According to our database, Alik Zelichenok authored at least 1 paper in 2017.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2017

A 1.8mW 450-900MHz ±15ps period jitter programmable multi-output clock generator with high supply noise tolerance in 28-nm CMOS process.

Bhavin Odedara, Srikanth Bojja, Nitin Gupta, Igor Rapoport, Tony Ross, Alik Zelichenok

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2017