Alicja Pierzynska

According to our database, Alicja Pierzynska authored at least 5 papers between 1992 and 1997.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

1997

Pitfalls in delay fault testing.

Alicja Pierzynska, Slawomir Pilarski

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

1995

Non-Robust versus Robust.

Alicja Pierzynska, Slawomir Pilarski

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

Quality considerations in delay fault testing.

Alicja Pierzynska, Slawomir Pilarski

Proceedings of the Proceedings EURO-DAC'95, 1995

1993

BIST and Delay Fault Detection.

Slawomir Pilarski, Alicja Pierzynska

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

1992

Built-in self-test design for large embedded PLAs.

Alicja Pierzynska, Slawomir Pilarski

Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992