Ali Shahabi

According to our database, Ali Shahabi authored at least 11 papers between 2007 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

A Numerical Technique for Coupling the Momentum and the Continuity Equations for Semi-Implicit 3D Ocean Models.

Ali Shahabi, Reza Ghiassi

CoRR, 2024

2022

An event-driven simulation-optimisation approach to improve the resiliency of operation in a double-track urban rail line.

Ali Shahabi, Sadigh Raissi, Kaveh Khalili Damghani, Meysam Rafei

J. Simulation, 2022

2021

Designing a resilient skip-stop schedule in rapid rail transit using a simulation-based optimization methodology.

Ali Shahabi, Sadigh Raissi, Kaveh Khalili Damghani, Meysam Rafei

Oper. Res., 2021

2020

Experimental Validation of CT-Snubber for Multichip SiC MOSFET Power Module.

Bo Fu, Ali Shahabi, Todd J. Freeborn, Andrew N. Lemmon, Mithat C. Kisacikoglu

Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2014

Configurable Systolic Matrix Multiplication.

Parastoo Kamranfar, Ali Shahabi, Ghazaleh Vazhbakht, Zainalabedin Navabi

Proceedings of the 2014 27th International Conference on VLSI Design, 2014

2012

A novel graceful degradable routing algorithm for 3D on-chip networks.

Reza Nakhjavani, Ali Shahabi, Saeed Safari, Zainalabedin Navabi

Proceedings of the 2012 Interconnection Network Architecture, 2012

2010

A partitioning approach to improve reconfigurable neuron-inspired online BIST.

Ali Shahabi, S. Behdad Hosseini, Hasan Sohofi, Zainalabedin Navabi

Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

A reconfigurable online BIST for combinational hardware using digital neural networks.

S. Behdad Hosseini, Ali Shahabi, Hasan Sohofi, Zainalabedin Navabi

Proceedings of the 15th European Test Symposium, 2010

2007

Degradable mesh-based on-chip networks using programmable routing tables.

Ali Shahabi, Nima Honarmand, Hasan Sohofi, Zainalabedin Navabi

IEICE Electron. Express, 2007

High Level Synthesis of Degradable ASICs Using Virtual Binding.

Nima Honarmand, Ali Shahabi, Hasan Sohofi, Maghsoud Abbaspour, Zainalabedin Navabi

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

Programmable Routing Tables for Degradable Torus-Based Networks on Chips.

Ali Shahabi, Nima Honarmand, Zainalabedin Navabi

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007