Ali Mahani

Nooshin Taheri-Chatrudi

IEEE Access, 2024

Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators.

[BibT_eX]

[DOI]

Natalia Cherezova

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

2023

Design and Analysis of High Performance Heterogeneous Block-based Approximate Adders.

[BibT_eX]

[DOI]

Muhammad Abdullah Hanif

ACM Trans. Embed. Comput. Syst., November, 2023

LRDB: LSTM Raw data DNA Base-caller based on long-short term models in an active learning environment.

[BibT_eX]

[DOI]

Ahmad Rezaei

Sebastian Magierowski

CoRR, 2023

CAE-CNNLoc: An Edge-based WiFi Fingerprinting Indoor Localization Using Convolutional Neural Network and Convolutional Auto-Encoder.

[BibT_eX]

[DOI]

CoRR, 2023

scaleTRIM: Scalable TRuncation-Based Integer Approximate Multiplier with Linearization and Compensation.

[BibT_eX]

[DOI]

Behnam Ghavami

Muhammad Abdullah Hanif

CoRR, 2023

2022

A novel component mixing and mixed redundancy strategy for reliability optimization.

[BibT_eX]

[DOI]

Saeideh Sheikhpour

Int. J. Syst. Assur. Eng. Manag., 2022

A Novel Fault-Tolerant Logic Style with Self-Checking Capability.

[BibT_eX]

[DOI]

Proceedings of the 28th IEEE International Symposium on On-Line Testing and Robust System Design, 2022

2021

High-throughput configurable SIMON architecture for flexible security.

[BibT_eX]

[DOI]

Saeideh Sheikhpour

Mohammad Hassani Sadi

Microelectron. J., 2021

Reliable advanced encryption standard hardware implementation: 32- bit and 64-bit data-paths.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2021

Accelerating Deep Convolutional Neural Network base on stochastic computing.

[BibT_eX]

[DOI]

Mohamad Hasani Sadi

Integr., 2021

Strengthened 32-bit AES implementation: Architectural error correction configuration with a new voting scheme.

[BibT_eX]

[DOI]

Saeideh Sheikhpour

IET Comput. Digit. Tech., 2021

Noise-based logic locking scheme against signal probability skew analysis.

[BibT_eX]

[DOI]

Ahmad Rezaei

IET Comput. Digit. Tech., 2021

Hardware acceleration of the novel two dimensional Burrows-Wheeler Aligner algorithm with maximal exact matches seed extension kernel.

[BibT_eX]

[DOI]

Sebastian Magierowski

IET Circuits Devices Syst., 2021

High Performance and Optimal Configuration of Accurate Heterogeneous Block-Based Approximate Adder.

[BibT_eX]

[DOI]

Muhammad Abdullah Hanif

CoRR, 2021

2020

H-V scan and diagonal trajectory: accurate and low power localization algorithms in WSNs.

[BibT_eX]

[DOI]

J. Ambient Intell. Humaniz. Comput., 2020

A survey on fault injection methods of digital integrated circuits.

[BibT_eX]

[DOI]

Integr., 2020

A Novel Energy-Efficient Clustering Protocol Using Two-Stage Genetic Algorithm for Improving the Lifetime of Wireless Sensor Networks.

[BibT_eX]

[DOI]

Nooshin Taheri-Chatrudi

Int. J. Comput. Intell. Appl., 2020

Obstacle-resistant hybrid localisation algorithm.

[BibT_eX]

[DOI]

IET Wirel. Sens. Syst., 2020

A high-performance MEMRISTOR-based Smith-Waterman DNA sequence alignment Using FPNI structure.

[BibT_eX]

[DOI]

CoRR, 2020

DMR-based Technique for Fault Tolerant AES S-box Architecture.

[BibT_eX]

[DOI]

CoRR, 2020

2019

Gravitational search algorithm with both attractive and repulsive forces.

[BibT_eX]

[DOI]

Esmat Rashedi

Soft Comput., 2019

High throughput fault-resilient AES architecture.

[BibT_eX]

[DOI]

IET Comput. Digit. Tech., 2019

Practical fault resilient hardware implementations of AES.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2019

Memristor-Based Hybrid Fault Tolerant Structure With Concurrent Reconfigurability.

[BibT_eX]

[DOI]

IEEE Embed. Syst. Lett., 2019

2018

A New ASIC Structure With Self-Repair Capability Using Field-Programmable Nanowire Interconnect Architecture.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2018

Fault-tolerant delay cell for ring oscillator application in 65 nm CMOS technology.

[BibT_eX]

[DOI]

IET Circuits Devices Syst., 2018

Accurate 3D-Tracking System for Wireless Indoor Personal Positioning.

[BibT_eX]

[DOI]

Proceedings of the 11th International Symposium on Communication Systems, 2018

2017

Particle Swarm Optimization with Intelligent Mutation for Nonlinear Mixed-Integer Reliability-Redundancy Allocation.

[BibT_eX]

[DOI]

Int. J. Comput. Intell. Appl., 2017

Availability Improvement Method for Repairable Systems Using Modified Ant Colony Optimisation.

[BibT_eX]

[DOI]

Int. J. Comput. Intell. Appl., 2017

2016

Low cost ACA-based multicast routing for multi-media applications.

[BibT_eX]

[DOI]

Proceedings of the 10th International Symposium on Communication Systems, 2016

A novel anchor-based localization method.

[BibT_eX]

[DOI]

Amin Kargar

Proceedings of the 10th International Symposium on Communication Systems, 2016

A novel gate grading approach for soft error tolerance in combinational circuits.

[BibT_eX]

[DOI]

Jie Han

Bruce F. Cockburn

Proceedings of the 2016 IEEE Canadian Conference on Electrical and Computer Engineering, 2016

2015

New Design of Scan Flip-Flop to Increase Speed and Reduce Power Consumption.

[BibT_eX]

[DOI]

Ramin Razmdideh

Mohsen Saneei

J. Circuits Syst. Comput., 2015

Time-to-digital convertor based on resolution control.

[BibT_eX]

[DOI]

Asma Dehghani

Mohsen Saneei

IET Circuits Devices Syst., 2015

Energy efficient fast predictor for WSN-based target tracking.

[BibT_eX]

[DOI]

M. Mirsadeghi

Ann. des Télécommunications, 2015

2014

Channel assignment in multi-radio wireless mesh networks using an improved gravitational search algorithm.

[BibT_eX]

[DOI]

Mohammad Doraghinejad

Hossein Nezamabadi-pour

J. Netw. Comput. Appl., 2014

A Novel Fault Tolerant Switch for Reliable NoC Design.

[BibT_eX]

[DOI]

Davoud Afrasiabi

Hamid Reza Naji

J. Circuits Syst. Comput., 2014

On the security of RFID anti-counting security protocol (ACSP).

[BibT_eX]

[DOI]

Masoumeh Safkhani

J. Comput. Appl. Math., 2014

A new automated design and optimization method of CMOS logic circuits based on Modified Imperialistic Competitive Algorithm.

[BibT_eX]

[DOI]

Mehdi Anjomshoa

Salahedin Sadeghifard

Appl. Soft Comput., 2014

2013

Probabilistic Transfer Matrix with mixed Binary-Decimal Coding for Logic Circuit Reliability Analysis.

[BibT_eX]

[DOI]

Mohsen Saneei

J. Circuits Syst. Comput., 2013

Energy-efficient network design via modelling: optimal designing point for energy, reliability, coverage and end-to-end delay.

[BibT_eX]

[DOI]

IET Networks, 2013

2012

Non-uniform distribution of multi-hop sensor networks: performance improvement and energy hole mitigation.

[BibT_eX]

[DOI]

IET Wirel. Sens. Syst., 2012

Two-stage uncertainty incorporating in optical core networks.

[BibT_eX]

[DOI]

Habib F. Rashvand

IET Commun., 2012

FPGA implementation of LMS self correcting adaptive filter (SCAF) and hardware analysis.

[BibT_eX]

[DOI]

Proceedings of the 8th International Symposium on Communication Systems, 2012

Duplication avoidance for energy efficient wireless sensor networks.

[BibT_eX]

[DOI]

Mohammad H. Askari-Hemmat

Proceedings of the 8th International Symposium on Communication Systems, 2012

Reliability or performance: A tradeoff in wireless sensor networks.

[BibT_eX]

[DOI]