Ali M. Shatnawi
Orcid: 0000-0002-4237-7485
According to our database1,
Ali M. Shatnawi
authored at least 25 papers
between 1995 and 2022.
Collaborative distances:
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Bibliography
2022
Multim. Tools Appl., 2022
2021
Int. J. Commun. Networks Inf. Secur., 2021
2019
Intelligent traffic light scheduling technique using calendar-based history information.
Future Gener. Comput. Syst., 2019
Clust. Comput., 2019
2018
J. Supercomput., 2018
An improved class of real-coded Genetic Algorithms for numerical optimization<sup>✰</sup>.
Neurocomputing, 2018
A New Multi-threaded and Interleaving Approach to Enhance String Matching for Intrusion Detection Systems.
Int. J. Commun. Networks Inf. Secur., 2018
High-Speed Low-Power Flash ADC Architecture Using Switched-Capacitor Positive Feedback Comparator and Parallel Single-Gate Encoder.
Circuits Syst. Signal Process., 2018
Proceedings of the International Arab Conference on Information Technology, 2018
2017
Proceedings of the Ninth International Conference on Advanced Computational Intelligence, 2017
A novel differential crossover strategy based on covariance matrix learning with Euclidean neighborhood for solving real-world problems.
Proceedings of the 2017 IEEE Congress on Evolutionary Computation, 2017
2013
Static scheduling of directed acyclic data flow graphs onto multiprocessors using particle swarm optimization.
Comput. Oper. Res., 2013
2010
J. Inf. Sci. Eng., 2010
2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
Architectural Synthesis of DSP Applications with Dynamically Reconfigurable Functional Units.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
A Delay-Optimal Static Scheduling of DSP Applications Mapped onto Multiprocessor Architectures.
Proceedings of the Fifth International Conference on Parallel Computing in Electrical Engineering (PARELEC 2006), 2006
Recognition of gestures in arabic sign language using neural networks.
Proceedings of the Artificial Intelligence and Soft Computing, 2006
2004
High level synthesis of integrated heterogeneous pipelined processing elements for DSP applications.
Comput. Electr. Eng., 2004
A Flow-Based Algorithm for Computing the Iteration Bound in Recursive Data Flow Graphs.
Proceedings of the International Conference on Computational Intelligence, 2004
2002
Optimal Scheduling of Digital Signal Processing Data-flow Graphs using Shortest-path Algorithms.
Comput. J., 2002
A vector based fast block motion estimation algorithm for implementation on SIMD architectures.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002
Optimization of the three-step search algorithm by exclusion of stationary macroblocks from the search process.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
1999
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999
1995
Rate-Optimal Static Scheduling of DSP Data Flow Graphs onto Multiprocessors using Circuit Contraction.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995