Ali Hajiabadi

Orcid: 0000-0002-3219-7544

According to our database1, Ali Hajiabadi authored at least 15 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Providing High-Performance Execution with a Sequential Contract for Cryptographic Programs.
CoRR, 2024

Efficient Detection and Mitigation Schemes for Speculative Side Channels.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

PREFETCHX: Cross-Core Cache-Agnostic Prefetcher-based Side-Channel Attacks.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

GADGETSPINNER: A New Transient Execution Primitive Using the Loop Stream Detector.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024

Conjuring: Leaking Control Flow via Speculative Fetch Attacks.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Levioso: Efficient Compiler-Informed Secure Speculation.
Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

2023
Mitigating Speculation-based Attacks through Configurable Hardware/Software Co-design.
CoRR, 2023

New Cross-Core Cache-Agnostic and Prefetcher-based Side-Channels and Covert-Channels.
CoRR, 2023

HidFix: Efficient Mitigation of Cache-Based Spectre Attacks Through Hidden Rollbacks.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2022
Fast, Robust and Accurate Detection of Cache-Based Spectre Attack Phases.
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022

2021
Mitigating Power Attacks through Fine-Grained Instruction Reordering.
CoRR, 2021

ELFies: Executable Region Checkpoints for Performance Analysis and Simulation.
Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization, 2021

NOREBA: a compiler-informed non-speculative out-of-order commit processor.
Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

2020
Enabling High-Capacity, Latency-Tolerant, and Highly-Concurrent GPU Register Files via Software/Hardware Cooperation.
CoRR, 2020

2019
Highly Concurrent Latency-tolerant Register Files for GPUs.
ACM Trans. Comput. Syst., 2019


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