Ali Ahmadinia
Orcid: 0000-0003-4612-1142
According to our database1,
Ali Ahmadinia
authored at least 106 papers
between 2003 and 2024.
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Bibliography
2024
Virtual Real., December, 2024
Construction of trail networks based on growing self-organizing maps and public GPS data.
Int. J. Knowl. Based Intell. Eng. Syst., 2024
2023
Proceedings of the IEEE International Conference on Big Data, 2023
A low-cost IoT-based Smart Farming System For Crop Recommendation and Resource Management.
Proceedings of the IEEE International Conference on Big Data, 2023
2022
IET Comput. Digit. Tech., 2022
Framework for Scalable Content Development in Hands-On Virtual and Mixed Reality Science Labs.
Proceedings of the 8th International Conference of the Immersive Learning Research Network, 2022
Proceedings of the Fifteenth International Conference on Machine Vision, 2022
Proceedings of the 21st IEEE International Conference on Machine Learning and Applications, 2022
2021
J. Circuits Syst. Comput., 2021
Proceedings of the 8th IEEE International Conference on Cyber Security and Cloud Computing, 2021
2020
Proceedings of the 7th International Conference on Internet of Things: Systems, 2020
2019
Int. J. Cyber Phys. Syst., 2019
MobileNet-Tiny: A Deep Neural Network-Based Real-Time Object Detection for Rasberry Pi.
Proceedings of the 18th IEEE International Conference On Machine Learning And Applications, 2019
Proceedings of the 2019 IEEE International Conference on Big Data (IEEE BigData), 2019
2018
Energy and performance-aware application mapping for inhomogeneous 3D networks-on-chip.
J. Syst. Archit., 2018
Comput., 2018
Real-Time Intelligent Air Quality Evaluation on a Resource-Constrained Embedded Platform.
Proceedings of the 4th IEEE International Conference on Big Data Security on Cloud, 2018
An Intelligent Real-Time Occupancy Monitoring System with Enhanced Encryption and Privacy.
Proceedings of the 17th IEEE International Conference on Cognitive Informatics & Cognitive Computing, 2018
2017
IEEE Trans. Parallel Distributed Syst., 2017
IEEE Trans. Ind. Informatics, 2017
IEEE Trans. Emerg. Top. Comput., 2017
Design and Implementation of a Cloud Enabled Random Neural Network-Based Decentralized Smart Controller With Intelligent Sensor Nodes for HVAC.
IEEE Internet Things J., 2017
Random neural network based cognitive engines for adaptive modulation and coding in LTE downlink systems.
Comput. Electr. Eng., 2017
Proceedings of the 11th International Conference on Distributed Smart Cameras, 2017
2016
Performance and Energy Aware Inhomogeneous 3D Networks-on-Chip Architecture Generation.
IEEE Trans. Parallel Distributed Syst., 2016
Random neural network based novel decision making framework for optimized and autonomous power control in LTE uplink system.
Phys. Commun., 2016
J. Circuits Syst. Comput., 2016
Tag-Protector: An Effective and Dynamic Detection of Illegal Memory Accesses through Compile Time Code Instrumentation.
Adv. Softw. Eng., 2016
Proceedings of the 2016 IEEE SENSORS, Orlando, FL, USA, October 30 - November 3, 2016, 2016
Random Neural Network Based Intelligent Intrusion Detection for Wireless Sensor Networks.
Proceedings of the International Conference on Computational Science 2016, 2016
Proceedings of the Third Workshop on Cryptography and Security in Computing Systems, 2016
2015
Impact of Learning Algorithms on Random Neural Network based Optimization for LTE-UL Systems.
Netw. Protoc. Algorithms, 2015
Integr., 2015
Experimental testing of a random neural network smart controller using a single zone test chamber.
IET Networks, 2015
Resource Management and Inter-Cell-Interference Coordination in LTE Uplink System Using Random Neural Network and Optimization.
IEEE Access, 2015
Critical Analysis of Learning Algorithms in Random Neural Network Based Cognitive Engine for LTE Systems.
Proceedings of the IEEE 81st Vehicular Technology Conference, 2015
Random neural network based power controller for inter-cell interference coordination in LTE-UL.
Proceedings of the IEEE International Conference on Communication, 2015
Proceedings of the 2015 IEEE Global Communications Conference, 2015
2014
Proceedings of the 7th International Conference on Security of Information and Networks, 2014
Proceedings of the 11th International Symposium on Wireless Communications Systems, 2014
Proceedings of the 2nd International Workshop on Many-core Embedded Systems, 2014
Performance analysis of random neural networks in LTE-UL of a cognitive radio system.
Proceedings of the 1st International Workshop on Cognitive Cellular Systems, 2014
Comparison of the Robustness of RNN, MPC and ANN Controller for Residential Heating System.
Proceedings of the 2014 IEEE Fourth International Conference on Big Data and Cloud Computing, 2014
Performance Analysis of Artificial Neural Network-Based Learning Schemes for Cognitive Radio Systems in LTE-UL.
Proceedings of the 28th International Conference on Advanced Information Networking and Applications Workshops, 2014
2013
Parallel Comput., 2013
Heterogeneous 3D Network-on-Chip Architectures: Area and Power Aware Design Techniques.
J. Circuits Syst. Comput., 2013
EURASIP J. Adv. Signal Process., 2013
Custom memory architecture for multi-core implementation of face detection algorithm.
Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013
Optimised Application Specific Architecture Generation and Mapping Approach for Heterogeneous 3D Networks-on-Chip.
Proceedings of the 16th IEEE International Conference on Computational Science and Engineering, 2013
Proceedings of the 2013 NASA/ESA Conference on Adaptive Hardware and Systems, 2013
2012
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012
2011
SIGARCH Comput. Archit. News, 2011
Optimization of reconfigurable multi-core system-on-chips for multi-standard applications.
Int. J. Knowl. Based Intell. Eng. Syst., 2011
Comput. J., 2011
An Efficient Router Architecture for Network on Chip.
Proceedings of the PECCS 2011, 2011
Proceedings of the Sixth International Symposium on Parallel Computing in Electrical Engineering (PARELEC 2011), 2011
Proceedings of the 2011 NORCHIP, Lund, Sweden, November 14-15, 2011, 2011
Proceedings of the Knowledge-Based and Intelligent Information and Engineering Systems, 2011
Proceedings of the Knowledge-Based and Intelligent Information and Engineering Systems, 2011
Proceedings of the Knowledge-Based and Intelligent Information and Engineering Systems, 2011
Proceedings of the 2011 International Conference on High Performance Computing & Simulation, 2011
2010
High level modeling and automated generation of heterogeneous SoC architectures with optimized custom reconfigurable cores and on-chip communication media.
J. Syst. Archit., 2010
Proceedings of the 10th IEEE International Conference on Computer and Information Technology, 2010
ReCoNodes - Optimization Methods for Module Scheduling and Placement on Reconfigurable Hardware Devices.
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010
2009
Proceedings of the Knowledge-Based and Intelligent Information and Engineering Systems, 2009
Proceedings of the Knowledge-Based and Intelligent Information and Engineering Systems, 2009
2008
Offline and Online Aspects of Defragmenting the Module Layout of a Partially Reconfigurable Device.
IEEE Trans. Very Large Scale Integr. Syst., 2008
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
Communication Centric Modelling of System on Chip Devices Targeting Multi-standard Telecommunication Applications.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
A state based framework for efficient system-level power estimation of of costum reconfigurable cores.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008
SystemC-based Custom Reconfigurable Cores for Wireless Applications.
Proceedings of the 2008 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2008
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
Dynamically Reconfigurable NoC with Bus Based Interface for Ease of Integration and Reduced Design Time.
Proceedings of the NASA/ESA Conference on Adaptive Hardware and Systems, 2008
2007
J. VLSI Signal Process., 2007
Optimal Free-Space Management and Routing-Conscious Dynamic Placement for Reconfigurable Devices.
IEEE Trans. Computers, 2007
Proceedings of the 2007 IEEE International SOC Conference, 2007
Power evaluation of the arbitration policy for different on-chip bus based SoC platform.
Proceedings of the 2007 IEEE International SOC Conference, 2007
Integrated Heterogenous Modelling for Power Estimation of Single Processor based Reconfigurable SoC Platform.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
System-level Modelling and Analysis of Embedded Reconfigurable Cores for Wireless Systems.
Proceedings of the FPL 2007, 2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
Proceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007), 2007
2006
PhD thesis, 2006
Proceedings of the ARCS 2006, 2006
2005
IEEE Des. Test Comput., 2005
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005
The Erlangen Slot Machine: Increasing Flexibility in FPGA-Based Reconfigurable Platforms.
Proceedings of the 2005 IEEE International Conference on Field-Programmable Technology, 2005
DyNoC: A Dynamic Infrastructure for Communication in Dynamically Reconfigurable Devices.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005
Defragmenting the Module Layout of a Partially Reconfigurable Device.
Proceedings of The 2005 International Conference on Engineering of Reconfigurable Systems and Algorithms, 2005
Partial Configuration Design and Implementation Challenges on Xilinx Virtex FPGAs.
Proceedings of the 18th International Conference on Architecture of Computing Systems, 2005
2004
Proceedings of the 17th Annual Symposium on Integrated Circuits and Systems Design, 2004
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004
Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004
FPGA architecture extensions for preemptive multitasking and hardware defragmentation.
Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004
Proceedings of the Field Programmable Logic and Application, 2004
Proceedings of the Field Programmable Logic and Application, 2004
Proceedings of the Field Programmable Logic and Application, 2004
Proceedings of the ARCS 2004, 2004
Proceedings of the Organic and Pervasive Computing, 2004
2003
Speeding up Online Placement for XILINX FPGAs by Reducing Configuration Overhead.
Proceedings of the IFIP VLSI-SoC 2003, 2003
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003
Proceedings of the 2003 IEEE International Conference on Field-Programmable Technology, 2003