Alhad Daftardar

Orcid: 0000-0001-8523-6490

According to our database1, Alhad Daftardar authored at least 6 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2024
SZKP: A Scalable Accelerator Architecture for Zero-Knowledge Proofs.
Proceedings of the 2024 International Conference on Parallel Architectures and Compilation Techniques, 2024

2022
Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory.
IEEE J. Solid State Circuits, 2022


2021
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

2020
Hardware Root-of-Trust-based integrity for shared library function pointers in embedded systems.
Microprocess. Microsystems, 2020

2019
Hardware Root-of-Trust Based Integrity for Shared Library Function Pointers in Embedded Systems.
Proceedings of the 8th Mediterranean Conference on Embedded Computing, 2019


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