Alfred L. Burress

According to our database, Alfred L. Burress authored at least 4 papers between 1997 and 2003.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2003

Self-checking logic design for FPGA implementation.

Parag K. Lala, Alfred L. Burress

IEEE Trans. Instrum. Meas., 2003

1999

A technique for designing self-checking logic for FPGAs.

Parag K. Lala, Alfred L. Burress

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

Self-Checking Logic Design for LUT-Based FPGAs.

Parag K. Lala, Alfred L. Burress

Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, 1999

1997

On-Line Testable Logic Desgin for FPGA Implementation.

Alfred L. Burress, Parag K. Lala

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997