Alfred E. Dunlop

According to our database1, Alfred E. Dunlop authored at least 7 papers between 1980 and 1997.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1990, "For contributions to automated layout of integrated circuits and development of techniques which significantly enhance performance.".

Timeline

1980
1982
1984
1986
1988
1990
1992
1994
1996
0
1
2
3
1
1
1
1
1
1
1

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1997
Managing complexity in IC design - Past, present, and future.
Bell Labs Tech. J., 1997

1994
Codesign from Cospecification.
Computer, 1994

1988
Optimization-based transistor sizing.
IEEE J. Solid State Circuits, April, 1988

Will Cell Generation Displace Standard Cells?
Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988

1985
A Procedure for Placement of Standard-Cell VLSI Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1985

1984
Chip layout optimization using critical path weighting.
Proceedings of the 21st Design Automation Conference, 1984

1980
SLIM-the translation of symbolic layouts into mask data.
Proceedings of the 17th Design Automation Conference, 1980


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