Alfio Zanchi

According to our database1, Alfio Zanchi authored at least 11 papers between 1998 and 2018.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2018
A diode-less compact voltage/frequency reference-in-one.
Proceedings of the 2018 IEEE Custom Integrated Circuits Conference, 2018

2008
Analysis and Characterization of the Effects of Clock Jitter in A/D Converters for Subsampling.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

A 16-bit 65-MS/s Pipeline ADC With 80-dBFS SNR Using Analog Auto-Calibration in SiGe SOI Complementary BiCMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

2005
A 16-bit 65-MS/s 3.3-V pipeline ADC core in SiGe BiCMOS with 78-dB SNR and 180-fs jitter.
IEEE J. Solid State Circuits, 2005

2003
Impact of capacitor dielectric relaxation on a 14-bit 70-MS/s pipeline ADC in 3-V BiCMOS.
IEEE J. Solid State Circuits, 2003

Measurement and SPICE prediction of sub-picosecond clock jitter in A/D converters.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2001
A 2-V 2.5-GHz-104-dBc/Hz at 100 kHz fully integrated VCO with wide-band low-noise automatic amplitude control loop.
IEEE J. Solid State Circuits, 2001

Automatic amplitude control loop for a 2-V, 2.5-GHz LC-tank VCO.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000
Phase noise degradation at high oscillation amplitudes in LC-tuned VCO's.
IEEE J. Solid State Circuits, 2000

Fast simulation techniques for phase noise analysis of oscillators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1998
Design Issues of LC Tuned Oscillators for Integrated Transceivers.
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998


  Loading...