Alexandru Plesco

According to our database, Alexandru Plesco authored at least 8 papers between 2010 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

Data-aware process networks.

Christophe Alias, Alexandru Plesco

Proceedings of the CC '21: 30th ACM SIGPLAN International Conference on Compiler Construction, 2021

2017

Optimizing Affine Control With Semantic Factorizations.

Christophe Alias, Alexandru Plesco

ACM Trans. Archit. Code Optim., 2017

2012

FPGA-specific synthesis of loop-nests with pipelined computational cores.

Christophe Alias, Bogdan Pasca, Alexandru Plesco

Microprocess. Microsystems, 2012

Optimizing remote accesses for offloaded kernels: application to high-level synthesis for FPGA.

Christophe Alias, Alain Darte, Alexandru Plesco

Proceedings of the 17th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2012

2011

An FPGA architecture for solving the Table Maker's Dilemma.

Florent de Dinechin, Jean-Michel Muller, Bogdan Pasca, Alexandru Plesco

Proceedings of the 22nd IEEE International Conference on Application-specific Systems, 2011

Automatic Generation of FPGA-Specific Pipelined Accelerators.

Christophe Alias, Bogdan Pasca, Alexandru Plesco

Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

2010

Program Transformations and Memory Architecture Optimizations for High-Level Synthesis of Hardware Accelerators. (Transformations de programmes et optimisations de l'architecture mémoire pour la synthèse de haut niveau d'accélérateurs matériels).

Alexandru Plesco

PhD thesis, 2010

Optimizing DDR-SDRAM communications at C-level for automatically-generated hardware accelerators an experience with the Altera C2H HLS tool.

Christophe Alias, Alain Darte, Alexandru Plesco

Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010