Alexandro Baldassin

According to our database, Alexandro Baldassin authored at least 50 papers between 2005 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Rank-based Hashing for Effective and Efficient Nearest Neighbor Search for Image Retrieval.

Vinicius Atsushi Sato Kawai, Lucas Pascotti Valem, Alexandro Baldassin, Edson Borin, Daniel Carlos Guimarães Pedronette, Longin Jan Latecki

ACM Trans. Multim. Comput. Commun. Appl., October, 2024

Using hardware-transactional-memory support to implement speculative task execution.

Juan Salamanca, Alexandro Baldassin

J. Parallel Distributed Comput., 2024

DUMBO: Making durable read-only transactions fly on hardware transactional memory.

João Barreto, Daniel Castro, Paolo Romano, Alexandro Baldassin

CoRR, 2024

Practical Interface Diversity for Improving Network Performance in IEEE 802.15.4.

Bruno Monteiro Pires, Carlos A. Astudillo, Alex Roschildt Pinto, Alexandro Baldassin

Proceedings of the IEEE Latin-American Conference on Communications, 2024

2023

On the impact of mode transition on phased transactional memory performance.

Catalina Munoz Morales, Bruno C. Honorio, Joao P. L. de Carvalho, Alexandro Baldassin, Guido Araujo

J. Parallel Distributed Comput., March, 2023

Adaptação automática de conteúdo aplicada em ambiente interativo de aprendizagem individualizada.

Fernanda F. Peronaglio, Aleardo Manacero, Alexandro Baldassin, Matheus S. Dos Santos, Renata Spolon Lobato, Roberta Spolon Ulson, Marcos Antônio Cavenaghi

Revista Brasileira de Informática na Educ., 2023

Evaluating the Performance of Speculative DOACROSS Loop Parallelization with taskloop.

Juan Salamanca, Alexandro Baldassin

CoRR, 2023

How to Efficiently Parallelize Irregular DOACROSS Loops Using Fine Granularity and OpenMP Tasks: The SPEC mcf Case.

Juan Salamanca, Alexandro Baldassin

Proceedings of the OpenMP: Advanced Task-Based, Device and Compiler Programming, 2023

2022

Using Barrier Elision to Improve Transactional Code Generation.

Bruno Chinelato Honorio, João P. L. de Carvalho, Catalina Munoz Morales, Alexandro Baldassin, Guido Araujo

ACM Trans. Archit. Code Optim., 2022

Persistent Memory: A Survey of Programming Support and Implementations.

Alexandro Baldassin, João Barreto, Daniel Castro, Paolo Romano

ACM Comput. Surv., 2022

Using Off-the-Shelf Hardware Transactional Memory to Implement Speculative While in OpenMP.

Juan Salamanca, Alexandro Baldassin

Proceedings of the OpenMP in a Modern World: From Multi-device Support to Meta Programming, 2022

2021

Improving Phased Transactional Memory via Commit Throughput and Capacity Estimation.

Catalina Munoz Morales, Bruno C. Honorio, Alexandro Baldassin, Guido Araujo

Proceedings of the 33rd IEEE International Symposium on Computer Architecture and High Performance Computing, 2021

Improving Speculative taskloop in Hardware Transactional Memory.

Juan Salamanca, Alexandro Baldassin

Proceedings of the OpenMP: Enabling Massive Node-Level Parallelism, 2021

SPHT: Scalable Persistent Hardware Transactions.

Daniel Castro, Alexandro Baldassin, João Barreto, Paolo Romano

Proceedings of the 19th USENIX Conference on File and Storage Technologies, 2021

Accelerating Graph Applications Using Phased Transactional Memory.

Catalina Munoz Morales, Rafael Murari, Joao P. L. de Carvalho, Bruno Chinelato Honorio, Alexandro Baldassin, Guido Araujo

Proceedings of the Euro-Par 2021: Parallel Processing, 2021

2020

An efficient parallel implementation for training supervised optimum-path forest classifiers.

Aldo Culquicondor, Alexandro Baldassin, César Castelo-Fernández, João P. L. de Carvalho, João Paulo Papa

Neurocomputing, 2020

Using Hardware Transactional Memory to Implement Speculative Privatization in OpenMP.

Juan Salamanca, Alexandro Baldassin

Proceedings of the Languages and Compilers for Parallel Computing, 2020

Improving Transactional Code Generation via Variable Annotation and Barrier Elision.

João P. L. de Carvalho, Bruno C. Honorio, Alexandro Baldassin, Guido Araujo

Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

NV-PhTM: An Efficient Phase-Based Transactional System for Non-volatile Memory.

Alexandro Baldassin, Rafael Murari, João P. L. de Carvalho, Guido Araujo, Daniel Castro, João Barreto, Paolo Romano

Proceedings of the Euro-Par 2020: Parallel Processing, 2020

2019

The Case for Phase-Based Transactional Memory.

Joao P. L. de Carvalho, Guido Araujo, Alexandro Baldassin

IEEE Trans. Parallel Distributed Syst., 2019

An optimized unsupervised manifold learning algorithm for manycore architectures.

Alexandro Baldassin, Ying Weng, Daniel Carlos Guimarães Pedronette, Jurandy Almeida

Inf. Sci., 2019

Semi-supervised and active learning through Manifold Reciprocal kNN Graph for image retrieval.

Daniel Carlos Guimarães Pedronette, Ying Weng, Alexandro Baldassin, Chaohuan Hou

Neurocomputing, 2019

A Proposal for Supporting Speculation in the OpenMP taskloop Construct.

Juan Salamanca, Alexandro Baldassin

Proceedings of the OpenMP: Conquering the Full Hardware Spectrum, 2019

2018

Data Summarization in the Node by Parameters (DSNP): Local Data Fusion in an IoT Environment.

Luis F. C. Maschi, Alex S. R. Pinto, Rodolfo Ipolito Meneguette, Alexandro Baldassin

Sensors, 2018

On the Efficiency of Transactional Code Generation: A GCC Case Study.

Bruno Chinelato Honorio, João P. L. de Carvalho, Alexandro José Baldassin

Proceedings of the Symposium on High Performance Computing Systems, 2018

Pattern Analysis in Drilling Reports using Optimum-Path Forest.

Gustavo José de Sousa, Daniel Carlos Guimarães Pedronette, Alexandro Baldassin, Pedro Ivo Monteiro Privatto, M. Gaseta, Ivan Rizzo Guilherme, Danilo Colombo, Luis Claudio Sugi Afonso, João P. Papa

Proceedings of the 2018 International Joint Conference on Neural Networks, 2018

2017

FGSCM: A Fine-Grained Approach to Transactional Lock Elision.

Gustavo Sousa, Alexandro Baldassin

Proceedings of the 29th International Symposium on Computer Architecture and High Performance Computing, 2017

Revisiting phased transactional memory.

Joao P. L. de Carvalho, Guido Araujo, Alexandro Baldassin

Proceedings of the International Conference on Supercomputing, 2017

Quaternionic Flower Pollination Algorithm.

Gustavo H. Rosa, Luis Claudio Sugi Afonso, Alexandro Baldassin, João P. Papa, Xin-She Yang

Proceedings of the Computer Analysis of Images and Patterns, 2017

2016

Energy-aware scheduling in transactional memory systems.

Ademir Marques Jr., Alexandro Baldassin

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

On the Harmony Search Using Quaternions.

João P. Papa, Danillo Roberto Pereira, Alexandro Baldassin, Xin-She Yang

Proceedings of the Artificial Neural Networks in Pattern Recognition, 2016

2015

Performance implications of dynamic memory allocators on transactional memory systems.

Alexandro Baldassin, Edson Borin, Guido Araujo

Proceedings of the 20th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2015

2014

Training Optimum-Path Forest on Graphics Processing Units.

Adriana S. Iwashita, Marcos V. T. Romero, Alexandro Baldassin, Kelton A. P. Costa, João P. Papa

Proceedings of the VISAPP 2014, 2014

2013

Transaction Scheduling Using Dynamic Conflict Avoidance.

Daniel Nicácio, Alexandro Baldassin, Guido Araujo

Int. J. Parallel Program., 2013

Transaction scheduling using conflict avoidance and Contention Intensity.

Márcio Machado Pereira, Alexandro Baldassin, Guido Araujo, Luiz Eduardo Buzato

Proceedings of the 20th Annual International Conference on High Performance Computing, 2013

2012

A transactional runtime system for the Cell/BE architecture.

Alexandro Baldassin, Felipe Goldstein, Rodolfo Azevedo

J. Parallel Distributed Comput., 2012

Energy-Performance Tradeoffs in Software Transactional Memory.

Alexandro Baldassin, Joao P. L. de Carvalho, Leonardo A. G. Garcia, Rodolfo Azevedo

Proceedings of the IEEE 24th International Symposium on Computer Architecture and High Performance Computing, 2012

Vectorized Algorithms for Quadtree Construction and Descent.

Eraldo P. Marinho, Alexandro Baldassin

Proceedings of the Algorithms and Architectures for Parallel Processing, 2012

2011

Using multiple abstraction levels to speedup an MPSoC virtual platform simulator.

João Moreira, Felipe Klein, Alexandro Baldassin, Paulo Centoducatte, Rodolfo Azevedo, Sandro Rigo

Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011

LUTS: A Lightweight User-Level Transaction Scheduler.

Daniel Nicácio, Alexandro Baldassin, Guido Araujo

Proceedings of the Algorithms and Architectures for Parallel Processing, 2011

2010

Concurrent programming with revisions and isolation types.

Sebastian Burckhardt, Alexandro Baldassin, Daan Leijen

Proceedings of the 25th Annual ACM SIGPLAN Conference on Object-Oriented Programming, 2010

STM versus lock-based systems: an energy consumption perspective.

Felipe Klein, Alexandro Baldassin, João Moreira, Paulo Centoducatte, Sandro Rigo, Rodolfo Azevedo

Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010

2009

Exploiting software transactional memory in the context of asymmetric architectures.

Alexandro Baldassin

PhD thesis, 2009

Characterizing the Energy Consumption of Software Transactional Memory.

Alexandro Baldassin, Felipe Klein, Guido Araujo, Rodolfo Azevedo, Paulo Centoducatte

IEEE Comput. Archit. Lett., 2009

On the energy-efficiency of software transactional memory.

Felipe Klein, Alexandro Baldassin, Guido Araujo, Paulo Centoducatte, Rodolfo Azevedo

Proceedings of the 22st Annual Symposium on Integrated Circuits and Systems Design: Chip on the Dunes, 2009

2008

An open-source binary utility generator.

Alexandro Baldassin, Paulo Centoducatte, Sandro Rigo, Daniel C. Casarotto, Luiz C. V. dos Santos, Max R. de O. Schultz, Olinto J. V. Furtado

ACM Trans. Design Autom. Electr. Syst., 2008

A Software Transactional Memory System for an Asymmetric Processor Architecture.

Felipe Goldstein, Alexandro Baldassin, Paulo Centoducatte, Rodolfo Azevedo, Leonardo A. G. Garcia

Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008

2007

A Flexible Platform Framework for Rapid Transactional Memory Systems Prototyping and Evaluation.

Fernando Kronbauer, Alexandro Baldassin, Bruno C. Albertini, Paulo Centoducatte, Sandro Rigo, Guido Araujo, Rodolfo Azevedo

Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007

Automatic Retargeting of Binary Utilities for Embedded Code Generation.

Alexandro Baldassin, Paulo Centoducatte, Sandro Rigo, Daniel C. Casarotto, Luiz C. V. dos Santos, Max R. de O. Schultz, Olinto J. V. Furtado

Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

2005

Extending the ArchC Language for Automatic Generation of Assemblers.

Alexandro Baldassin, Paulo Centoducatte, Sandro Rigo

Proceedings of the 17th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2005), 2005