Alexandre V. Bystrov

According to our database, Alexandre V. Bystrov authored at least 57 papers between 1995 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

A Rapid Reset 8-Transistor Physically Unclonable Function Utilising Power Gating.

Yujin Zheng, Alex Bystrov, Alex Yakovlev

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2019

Generalised Asynchronous Arbiter.

Stanislavs Golubcovs, Andrey Mokhov, Alex Bystrov, Danil Sokolov, Alex Yakovlev

Proceedings of the 19th International Conference on Application of Concurrency to System Design, 2019

2017

Design-time reliability evaluation for digital circuits.

Mohamed A. Abufalgha, Alex Bystrov

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

Derivation of the reliability metric for digital circuits.

Mohamed A. Abufalgha, Alex Bystrov

Proceedings of the 22nd IEEE European Test Symposium, 2017

2015

Location-dependent key management protocol for a WSN with a random selected cell reporter.

Harith Fakhrey, Said Boussakta, Rajesh Tiwari, Yasir Al-Mathehaji, Alex Bystrov

Proceedings of the 2015 IEEE International Conference on Communications, 2015

2014

FPGA design for dual-spectrum visual scene preparation in retinal prosthesis.

Musa Al Yaman, Walid Al-Atabany, Alex Bystrov, Patrick Degenaar

Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014

2013

Selected Articles from the IEEE LPonTR 2012 Workshop.

Alexandre V. Bystrov

J. Low Power Electron., 2013

Assessment of the One-Dimensional Generalized New Mersenne Number Transform for Security Systems.

Nick Rutter, Said Boussakta, Alex Bystrov

Proceedings of the 77th IEEE Vehicular Technology Conference, 2013

Simulation Testing of a Real-Time Heuristic Scheduler with Automotive Benchmarks.

James Docherty, Alexandre V. Bystrov, Alex Yakovlev

Proceedings of the 15th International Conference on Computer Modelling and Simulation, 2013

FPGA design of a pulse encoder for optoelectronic neural stimulation and recording arrays.

Musa Al Yaman, Arfan Ghani, Alex Bystrov, Patrick Degenaar, Pleun Maaskant

Proceedings of the 2013 IEEE Biomedical Circuits and Systems Conference (BioCAS), Rotterdam, The Netherlands, October 31, 2013

2012

Design and security evaluation of balanced 1-of-n circuits.

Frank P. Burns, Alexandre V. Bystrov, Albert Koelmans, Alex Yakovlev

IET Comput. Digit. Tech., 2012

Identification of Key Energy Harvesting Parameters through Monte Carlo Simulations.

James Docherty, Alexandre V. Bystrov, Alex Yakovlev

Proceedings of the 14th International Conference on Computer Modelling and Simulation, 2012

Modelling and Analysis of Manufacturing Variability Effects from Process to Architectural Level.

Chenxi Ni, Ziyad Al Tarawneh, Gordon Russell, Alexandre V. Bystrov

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2012

Self-Timed Physically Unclonable Functions.

Julian P. Murphy, Máire O'Neill, Frank P. Burns, Alexandre V. Bystrov, Alexandre Yakovlev, Basel Halak

Proceedings of the 5th International Conference on New Technologies, 2012

Statistical delay modelling of manufacturing process variations at system level.

Chenxi Ni, Gordon Russell, Alex Bystrov

Proceedings of the 10th IEEE International NEWCAS Conference, 2012

Error detection and correction of single event upset (SEU) tolerant latch.

Norhuzaimin Julai, Alexandre Yakovlev, Alexandre V. Bystrov

Proceedings of the 18th IEEE International On-Line Testing Symposium, 2012

2011

Security Evaluation of Balanced 1-of- n Circuits.

Frank P. Burns, Alexandre V. Bystrov, Albert Koelmans, Alexandre Yakovlev

IEEE Trans. Very Large Scale Integr. Syst., 2011

Improving the Robustness of Self-timed SRAM to Variable Vdds.

Abdullah Baz, Delong Shang, Fei Xia, Alexandre Yakovlev, Alexandre V. Bystrov

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2011

2010

Selected Peer-Reviewed Articles from the LPonTR 2009 Workshop.

Alex Bystrov

J. Low Power Electron., 2010

On-line testing of bundled-data asynchronous handshake protocols.

Steffen Zeidler, Alexandre V. Bystrov, Milos Krstic, Rolf Kraemer

Proceedings of the 16th IEEE International On-Line Testing Symposium (IOLTS 2010), 2010

2008

Phase-Encoding for On-Chip Signalling.

Crescenzo D'Alessandro, Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev, Oleg V. Maevsky

IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Modeling and verification of the SDL-specified communication protocols using high-level Petri nets.

Valery A. Nepomniaschy, Victor S. Argirov, Dmitri M. Beloglazov, Alexandre V. Bystrov, Eugene A. Chetvertakov, Tatiana G. Churina

Program. Comput. Softw., 2008

Selected Peer-Reviewed Articles from the LPonTR 2008 Workshop.

Alex Bystrov, João Paulo Teixeira

J. Low Power Electron., 2008

Implementation of a phase-encoding signalling prototype chip.

Crescenzo D'Alessandro, Alex Bystrov, Alex Yakovlev

Proceedings of the ESSCIRC 2008, 2008

2007

Registers for Phase Difference Based Logic.

Delong Shang, Alexandre Yakovlev, Albert Koelmans, Danil Sokolov, Alexandre V. Bystrov

IEEE Trans. Very Large Scale Integr. Syst., 2007

Direct Mapping of Low-Latency Asynchronous Controllers From STGs.

Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

A C-element Latch Scheme with Increased Transient Fault Tolerance for Asynchronous Circuits.

K. T. Gardiner, Alexandre Yakovlev, Alexandre V. Bystrov

Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007

Application of Modified Coloured Petri Nets to Modeling and Verification of SDL Specified Communication Protocols.

Valery A. Nepomniaschy, Gennady I. Alekseev, Victor S. Argirov, Dmitri M. Beloglazov, Alexandre V. Bystrov, Eugene A. Chetvertakov, Tatiana G. Churina, Sergey P. Mylnikov, Ruslan M. Novikov

Proceedings of the Computer Science, 2007

Delay/Phase Regeneration Circuits.

Crescenzo D'Alessandro, Andrey Mokhov, Alexandre V. Bystrov, Alexandre Yakovlev

Proceedings of the 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2007), 2007

2006

Online Testing by Protocol Decomposition.

Deepali Koppad, Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev

Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

Low-Cost Online Testing of Asynchronous Handshakes.

Delong Shang, Alexandre Yakovlev, Frank P. Burns, Fei Xia, Alexandre V. Bystrov

Proceedings of the 11th European Test Symposium, 2006

Multiple-Rail Phase-Encoding for NoC.

Crescenzo D'Alessandro, Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev, Oleg V. Maevsky

Proceedings of the 12th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2006), 2006

2005

Design and Analysis of Dual-Rail Circuits for Security Applications.

Danil Sokolov, Julian P. Murphy, Alexandre V. Bystrov, Alexandre Yakovlev

IEEE Trans. Computers, 2005

Off-Line Testing of Asynchronous Circuits.

Deepali Koppad, Alexandre V. Bystrov, Alexandre Yakovlev

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

PSK Signalling on NoC Buses.

Crescenzo D'Alessandro, Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev

Proceedings of the Integrated Circuit and System Design, 2005

On-Line Testing of Globally Asynchronous Circuits.

Delong Shang, Alexandre V. Bystrov, Alexandre Yakovlev, Deepali Koppad

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

Power-Balanced Self Checking Circuits for Cryptographic Chips.

Julian P. Murphy, Alexandre V. Bystrov, Alexandre Yakovlev

Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005

2004

Design and Analysis of a Self-Timed Duplex Communication System.

Alexandre Yakovlev, Stephen B. Furber, René Krenz, Alexandre V. Bystrov

IEEE Trans. Computers, 2004

A Low and Balanced Power Implementation of the AES Security Mechanism Using Self-Timed Circuits.

Delong Shang, Frank P. Burns, Alexandre V. Bystrov, Albert Koelmans, Danil Sokolov, Alexandre Yakovlev

Proceedings of the Integrated Circuit and System Design, 2004

Improving the Security of Dual-Rail Circuits.

Danil Sokolov, Julian P. Murphy, Alexandre V. Bystrov, Alexandre Yakovlev

Proceedings of the Cryptographic Hardware and Embedded Systems, 2004

2003

On-chip structures for timing measurement and test.

D. J. Kinniment, Oleh V. Maevsky, Alexandre V. Bystrov, Gordon Russell, Alexandre Yakovlev

Microprocess. Microsystems, 2003

STG Optimisation in the Direct Mapping of Asynchronous Circuits .

Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev

Proceedings of the 2003 Design, 2003

Visualization and Resolution of Coding Conflicts in Asynchronous Circuit Design.

Agnes Madalinski, Alexandre V. Bystrov, Victor Khomenko, Alexandre Yakovlev

Proceedings of the 2003 Design, 2003

Low-Latency Contro Structures with Slack.

Alexandre V. Bystrov, Danil Sokolov, Alexandre Yakovlev

Proceedings of the 9th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2003), 2003

2002

Synchronization circuit performance.

David J. Kinniment, Alexandre V. Bystrov, Alex Yakovlev

IEEE J. Solid State Circuits, 2002

Visualization of Coding Conflicts in Asynchronous Circuit Design.

Agnes Madalinski, Alexandre V. Bystrov, Alexandre Yakovlev

Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

Synthesis of Asynchronous Circuits with Predictable Latency.

Alexandre V. Bystrov, Alexandre Yakovlev

Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

Analysis of the oscillation problem in tri-flops.

Oleh V. Maevsky, D. J. Kinniment, Alexandre Yakovlev, Alexandre V. Bystrov

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Visualization of Partial Order Models in VLSI Design Flow.

Alexandre V. Bystrov, Maciej Koutny, Alexandre Yakovlev

Proceedings of the 2002 Design, 2002

On-Chip Structures for Timing Measurements and Test.

D. J. Kinniment, Oleh V. Maevsky, Gordon Russell, Alexandre Yakovlev, Alexandre V. Bystrov

Proceedings of the 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 2002

Asynchronous Circuit Synthesis by Direct Mapping: Interfacing to Environment.

Alexandre V. Bystrov, Alexandre Yakovlev

Proceedings of the 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 2002

2001

Verification of Estelle-Specified Communication Protocols Using High-Level Petri Nets.

Valery A. Nepomniaschy, Gennady I. Alekseev, Alexandre V. Bystrov, Sergey P. Mylnikov, E. V. Okunishnikova, P. A. Chubarev, Tatiana G. Churina

Program. Comput. Softw., 2001

2000

Semi-modular Latch Chains for Asynchronous Circuit Design.

Nikolai Starodoubtsev, Alexandre V. Bystrov, Alexandre Yakovlev

Proceedings of the Integrated Circuit Design, 2000

Asynchronous Communication Mechanisms Using Self-Timed Circuits.

Fei Xia, Alexandre Yakovlev, Delong Shang, Alexandre V. Bystrov, Albert Koelmans, D. J. Kinniment

Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000

Priority Arbiters.

Alexandre V. Bystrov, D. J. Kinniment, Alexandre Yakovlev

Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000

1999

Implementing Model Checking and Equivalence Checking for Time Petri Nets by the RT-MEC Tool.

Alexandre V. Bystrov, I. B. Verbistskaite

Proceedings of the Parallel Computing Technologies, 1999

1995

Petri Net Modelling of Estelle-specified Communication Protocols.

Valery A. Nepomniaschy, Gennady I. Alekseev, Alexandre V. Bystrov, Tatiana G. Churina, Sergey P. Mylnikov, E. V. Okunishnikova

Proceedings of the Parallel Computing Technologies, 1995