Alexandre Coelho

According to our database, Alexandre Coelho authored at least 15 papers between 2003 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

Check-Bit Region Exploration in Two-Dimensional Error Correction Codes.

David C. C. Freitas, David F. M. Mota, David Coelho, Humberto Fontinele, Alexandre Coelho, Jarbas Silveira, Lirida Naviner, João Mota, César A. M. Marcon

IEEE Access, 2024

nMatrix: A New Decoding Algorithm for the Matrix ECC.

David C. C. Freitas, Lirida Alves de Barros Naviner, João Cesar Moura Mota, Jarbas Silveira, César A. M. Marcon, David Freitas Moura Mota, Alexandre Coelho

Proceedings of the 13th Latin-American Symposium on Dependable and Secure Computing, 2024

2020

A Dynamic Sufficient Condition of Deadlock-Freedom for High-Performance Fault-Tolerant Routing in Networks-on-Chips.

Amir Charif, Alexandre Coelho, Nacer-Eddine Zergainoh, Michael Nicolaidis

IEEE Trans. Emerg. Top. Comput., 2020

2019

NoCFI: A Hybrid Fault Injection Method for Networks-On-Chip.

Alexandre Coelho, Nacer-Eddine Zergainoh, Raoul Velazco

Proceedings of the IEEE Latin American Test Symposium, 2019

2018

First-Last: A Cost-Effective Adaptive Routing Solution for TSV-Based Three-Dimensional Networks-on-Chip.

Amir Charif, Alexandre Coelho, Masoumeh Ebrahimi, Nader Bagherzadeh, Nacer-Eddine Zergainoh

IEEE Trans. Computers, 2018

A Runtime Fault-Tolerant Routing Scheme for Partially Connected 3D Networks-on-Chip.

Alexandre Coelho, Amir Charif, Nacer-Eddine Zergainoh, Raoul Velazco

Proceedings of the 2018 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2018

A soft-error resilient route computation unit for 3D Networks-on-Chips.

Alexandre Coelho, Amir Charif, Nacer-Eddine Zergainoh, Juan A. Fraire, Raoul Velazco

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017

A Framework for Scalable TSV Assignment and Selection in Three-Dimensional Networks-on-Chips.

Amir Charif, Alexandre Coelho, Nacer-Eddine Zergainoh, Michael Nicolaidis

VLSI Design, 2017

Preliminary results of NETFI-2: An automatic method for fault injection on HDL-based designs.

M. Solinas, Alexandre Coelho, Juan A. Fraire, Nacer-Eddine Zergainoh, Pablo A. Ferreyra, Raoul Velazco

Proceedings of the 18th IEEE Latin American Test Symposium, 2017

MINI-ESPADA: A low-cost fully adaptive routing mechanism for Networks-on-Chips.

Amir Charif, Alexandre Coelho, Nacer-Eddine Zergainoh, Michael Nicolaidis

Proceedings of the 18th IEEE Latin American Test Symposium, 2017

SEU impact in processor's control-unit: Preliminary results obtained for LEON3 soft-core.

Thierry Bonnoit, Alexandre Coelho, Nacer-Eddine Zergainoh, Raoul Velazco

Proceedings of the 18th IEEE Latin American Test Symposium, 2017

Rout3D: A lightweight adaptive routing algorithm for tolerating faulty vertical links in 3D-NoCs.

Amir Charif, Nacer-Eddine Zergainoh, Alexandre Coelho, Michael Nicolaidis

Proceedings of the 22nd IEEE European Test Symposium, 2017

Detailed and highly parallelizable cycle-accurate network-on-chip simulation on GPGPU.

Amir Charif, Alexandre Coelho, Nacer-Eddine Zergainoh, Michael Nicolaidis

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2004

Parallel Volume Rendering for Ocean Visualization in a Cluster of PCs.

Alexandre Coelho, Marcio Nascimento, Cristiana Bentes, Maria Clicia Stelling de Castro, Ricardo C. Farias

Proceedings of the VI Brazilian Symposium on Geoinformatics, 2004

2003

Work Distribution for Parallel ZSweep Algorithm.

Ricardo C. Farias, Cristiana Bentes, Alexandre Coelho, Sergio Guedes, Luiz M. G. Gonçalves

Proceedings of the 16th Brazilian Symposium on Computer Graphics and Image Processing (SIBGRAPI 2003), 2003