Alessandro Vallero

According to our database, Alessandro Vallero authored at least 22 papers between 2014 and 2019.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2019

SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems.

Alessandro Vallero, Alessandro Savino, Athanasios Chatzidimitriou, Manolis Kaliorakis, Maha Kooli, Marc Riera, Martí Anglada, Giorgio Di Natale, Alberto Bosio, Ramon Canal, Antonio González, Dimitris Gizopoulos, Riccardo Mariani, Stefano Di Carlo

IEEE Trans. Computers, 2019

Securing Soft IP Cores in FPGA based Reconfigurable Mobile Heterogeneous Systems.

Alberto Carelli, Cataldo Basile, Alessandro Savino, Alessandro Vallero, Stefano Di Carlo

CoRR, 2019

Bayesian models for early cross-layer reliability analysis and design space exploration.

Alessandro Vallero, Alessandro Savino, Alberto Carelli, Stefano Di Carlo

Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019

Combining Cluster Sampling and ACE analysis to improve fault-injection based reliability evaluation of GPU-based systems.

Alessandro Vallero, Stefano Di Carlo

Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019

2018

ReDO: Cross-Layer Multi-Objective Design-Exploration Framework for Efficient Soft Error Resilient Systems.

Alessandro Savino, Alessandro Vallero, Stefano Di Carlo

IEEE Trans. Computers, 2018

Multi-faceted microarchitecture level reliability characterization for NVIDIA and AMD GPUs.

Alessandro Vallero, Sotiris Tselonis, Dimitris Gizopoulos, Stefano Di Carlo

Proceedings of the 36th IEEE VLSI Test Symposium, 2018

Shielding Performance Monitor Counters: a double edged weapon for safety and security.

Alberto Carelli, Alessandro Vallero, Stefano Di Carlo

Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

Trading-off reliability and performance in FPGA-based reconfigurable heterogeneous systems.

Alessandro Vallero, Alberto Carelli, Stefano Di Carlo

Proceedings of the 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2018

Securing bitstream integrity, confidentiality and authenticity in reconfigurable mobile heterogeneous systems.

Alberto Carelli, Carlo Alberto Cristofanini, Alessandro Vallero, Cataldo Basile, Paolo Prinetto, Stefano Di Carlo

Proceedings of the IEEE International Conference on Automation, 2018

2017

Cross layer reliability estimation for digital systems.

Alessandro Vallero

PhD thesis, 2017

Microarchitecture level reliability comparison of modern GPU designs: First findings.

Alessandro Vallero, Stefano Di Carlo, Sotiris Tselonis, Dimitris Gizopoulos

Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

SIFI: AMD southern islands GPU microarchitectural level fault injector.

Alessandro Vallero, Dimitris Gizopoulos, Stefano Di Carlo

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

2016

Memristive Biosensors Integration With Microfluidic Platform.

Alessandro Vallero, Ioulia Tzouvadaki, Francesca Puppo, Marie-Agnes Doucey, Jean-François Delaloye, Giovanni De Micheli, Sandro Carrara

IEEE Trans. Circuits Syst. I Regul. Pap., 2016

Cross-layer system reliability assessment framework for hardware faults.

Alessandro Vallero, Alessandro Savino, Gianfranco Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, Sotiris Tselonis, Manolis Kaliorakis, Dimitris Gizopoulos, Marc Riera, Ramon Canal, Antonio González, Maha Kooli, Alberto Bosio, Giorgio Di Natale

Proceedings of the 2016 IEEE International Test Conference, 2016

Resistance impact by long connections on electrical behavior of integrated Memristive Biosensors.

Ioulia Tzouvadaki, Alessandro Vallero, Francesca Puppo, Giovanni De Micheli, Sandro Carrara

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

RIIF-2: Toward the next generation reliability information interchange format.

Alessandro Savino, Stefano Di Carlo, Alessandro Vallero, Gianfranco Politano, Dimitris Gizopoulos, Adrian Evans

Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

2015

Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview.

Alessandro Vallero, Sotiris Tselonis, Nikos Foutris, Manolis Kaliorakis, Maha Kooli, Alessandro Savino, Gianfranco Politano, Alberto Bosio, Giorgio Di Natale, Dimitris Gizopoulos, Stefano Di Carlo

Microprocess. Microsystems, 2015

Bayesian network early reliability evaluation analysis for both permanent and transient faults.

Alessandro Vallero, Alessandro Savino, Sotiris Tselonis, Nikos Foutris, Manolis Kaliorakis, Gianfranco Politano, Dimitris Gizopoulos, Stefano Di Carlo

Proceedings of the 21st IEEE International On-Line Testing Symposium, 2015

A Bayesian model for system level reliability estimation.

Alessandro Vallero, Alessandro Savino, Sotiris Tselonis, Nikos Foutris, Manolis Kaliorakis, Gianfranco Politano, Dimitris Gizopoulos, Stefano Di Carlo

Proceedings of the 20th IEEE European Test Symposium, 2015

2014

Cross-layer early reliability evaluation: Challenges and promises.

Stefano Di Carlo, Alessandro Vallero, Dimitris Gizopoulos, Giorgio Di Natale, Antonio González, Ramon Canal, Riccardo Mariani, M. Pipponzi, Arnaud Grasset, Philippe Bonnot, Frank Reichenbach, Gulzaib Rafiq, Trond Loekstad

Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

A novel methodology to increase fault tolerance in autonomous FPGA-based systems.

Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Alessandro Vallero

Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Cross-Layer Early Reliability Evaluation for the Computing cOntinuum.

Stefano Di Carlo, Alessandro Vallero, Dimitris Gizopoulos, Giorgio Di Natale, Arnaud Grasset, Riccardo Mariani, Frank Reichenbach

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014