Alessandro Marongiu

According to our database1, Alessandro Marongiu authored at least 14 papers between 1999 and 2020.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2020
Using High-Level Synthesis to Implement the Matrix-Vector Multiplication on FPGA.
Proceedings of the High Performance Computing - 35th International Conference, 2020

2007
The HARWEST High Level Synthesis Flow to Design a Special-Purpose Architecture to Simulate the 3D Ising Model.
Proceedings of the Parallel Computing: Architectures, 2007

2005
Statistical Methods for the Discovery of Co-Operative Transcription Factors: The Co-bind Code Revised.
Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005), 2005

2004
A specialized hardware device for the protein similarity search.
Concurr. Pract. Exp., 2004

2003
Designing hardware for protein sequence analysis.
Bioinform., 2003

PROSIDIS: A Special Purpose Processor for PROtein SImilarity DIScovery.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

2002
High Level Synthesis for Programmable Devices: The HADES Project.
Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

2001
Parallel dedicated hardware devices for heterogeneous computations.
Proceedings of the 2001 ACM/IEEE conference on Supercomputing, 2001

2000
Automatic Mapping of System of N-Dimensional Affine Precurrence Equations (SARE) onto Distributed Memory Parallel Systems.
IEEE Trans. Software Eng., 2000

Automatic Generation of Parallel Programs from Affine Iterative Algorithms.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2000

Exact realization of large DT-CNNs on limited-sized CNN circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

High Level Software Synthesis of Affine Iterative Algorithms onto Parallel Architectures.
Proceedings of the High-Performance Computing and Networking, 8th International Conference, 2000

Heterogeneity as Key Feature of High Performance Computing: the PQE1 Prototype.
Proceedings of the 9th Heterogeneous Computing Workshop, 2000

1999
A New Memory-Saving Technique to Map System of Affine Recurrence Equations (SARE) onto Distributed Memory Systems.
Proceedings of the 13th International Parallel Processing Symposium / 10th Symposium on Parallel and Distributed Processing (IPPS / SPDP '99), 1999


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