Alessandro Biondi

Orcid: 0000-0002-6625-9336

Affiliations:
  • Scuola Superiore Sant'Anna, Pisa, Italy


According to our database1, Alessandro Biondi authored at least 107 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Learning Memory-Contention Timing Models With Automated Platform Profiling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2024

CARLA-GeAR: A Dataset Generator for a Systematic Evaluation of Adversarial Robustness of Deep Learning Vision Models.
IEEE Trans. Intell. Transp. Syst., August, 2024

RT-Mimalloc: A New Look at Dynamic Memory Allocation for Real-Time Systems.
Proceedings of the 30th IEEE Real-Time and Embedded Technology and Applications Symposium, 2024

Attention-Based Real-Time Defenses for Physical Adversarial Attacks in Vision Applications.
Proceedings of the 15th ACM/IEEE International Conference on Cyber-Physical Systems, 2024

Optimizing Per-Core Priorities to Minimize End-To-End Latencies.
Proceedings of the 36th Euromicro Conference on Real-Time Systems, 2024

End-to-End Latency Optimization of Thread Chains Under the DDS Publish/Subscribe Middleware.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

AXI-REALM: A Lightweight and Modular Interconnect Extension for Traffic Regulation and Monitoring of Heterogeneous Real-Time SoCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023
Supporting AI-powered real-time cyber-physical systems on heterogeneous platforms via hypervisor technology.
Real Time Syst., December, 2023

Supporting logical execution time in multi-core POSIX systems.
J. Syst. Archit., November, 2023

On the Minimal Adversarial Perturbation for Deep Neural Networks With Provable Estimation Error.
IEEE Trans. Pattern Anal. Mach. Intell., April, 2023

Detecting Adversarial Examples by Input Transformations, Defense Perturbations, and Voting.
IEEE Trans. Neural Networks Learn. Syst., March, 2023

Increasing the Confidence of Deep Neural Networks by Coverage Analysis.
IEEE Trans. Software Eng., February, 2023

Analyzing Arm's MPAM From the Perspective of Time Predictability.
IEEE Trans. Computers, 2023

Bounding Memory Access Times in Multi-Accelerator Architectures on FPGA SoCs.
IEEE Trans. Computers, 2023

Optimizing Inter-Core Communications Under the LET Paradigm using DMA Engines.
IEEE Trans. Computers, 2023

Maximizing the Security Level of Real-Time Software While Preserving Temporal Constraints.
IEEE Access, 2023

Virtualized DDS Communication for Multi-Domain Systems: Architecture and Performance Evaluation of Design Alternatives.
Proceedings of the 29th IEEE Real-Time and Embedded Technology and Applications Symposium, 2023

Bounding the Data-Delivery Latency of DDS Messages in Real-Time Applications.
Proceedings of the 35th Euromicro Conference on Real-Time Systems, 2023

Replication-Based Scheduling of Parallel Real-Time Tasks.
Proceedings of the 35th Euromicro Conference on Real-Time Systems, 2023

Real-Time Packet-Based Intrusion Detection on Edge Devices.
Proceedings of Cyber-Physical Systems and Internet of Things Week 2023, 2023

Defending from Physically-Realizable Adversarial Attacks through Internal Over-Activation Analysis.
Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023

Robust-by-Design Classification via Unitary-Gradient Neural Networks.
Proceedings of the Thirty-Seventh AAAI Conference on Artificial Intelligence, 2023

2022
An I/O Virtualization Framework With I/O-Related Memory Contention Control for Real-Time Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

Profiling and controlling I/O-related memory contention in COTS heterogeneous platforms.
Softw. Pract. Exp., 2022

ARTe: Providing real-time multitasking to Arduino.
J. Syst. Softw., 2022

Optimized partitioning and priority assignment of real-time applications on heterogeneous platforms with hardware acceleration.
J. Syst. Archit., 2022

Partitioning real-time workloads on multi-core virtual machines.
J. Syst. Archit., 2022

A Linux-based support for developing real-time applications on heterogeneous platforms with dynamic FPGA reconfiguration.
Future Gener. Comput. Syst., 2022

Response-Time Analysis for Self-Suspending Tasks Under EDF Scheduling (Artifact).
Dagstuhl Artifacts Ser., 2022

CARLA-GeAR: a Dataset Generator for a Systematic Evaluation of Adversarial Robustness of Vision Models.
CoRR, 2022

On the Real-World Adversarial Robustness of Real-Time Semantic Segmentation Models for Autonomous Driving.
CoRR, 2022

Evaluating the Robustness of Semantic Segmentation for Autonomous Driving against Real-World Adversarial Patch Attacks.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2022

PAC-PL: Enabling Control-Flow Integrity with Pointer Authentication in FPGA SoC Platforms.
Proceedings of the 28th IEEE Real-Time and Embedded Technology and Applications Symposium, 2022

Response-Time Analysis for Self-Suspending Tasks Under EDF Scheduling.
Proceedings of the 34th Euromicro Conference on Real-Time Systems, 2022

Hardware Acceleration of Deep Neural Networks for Autonomous Driving on FPGA-based SoC.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

Placement of Chains of Real-Time Tasks on Heterogeneous Platforms under EDF Scheduling.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022

2021
Spatio-Temporal Optimization of Deep Neural Networks for Reconfigurable FPGA SoCs.
IEEE Trans. Computers, 2021

Task Splitting and Load Balancing of Dynamic Real-Time Workloads for Semi-Partitioned EDF.
IEEE Trans. Computers, 2021

Front Matter - ECRTS 2021 Artifacts, Table of Contents, Artifact Evaluation Committee.
Dagstuhl Artifacts Ser., 2021

SPHERE: A Multi-SoC Architecture for Next-Generation Cyber-Physical Systems Based on Heterogeneous Platforms.
IEEE Access, 2021

Automating the design flow under dynamic partial reconfiguration for hardware-software co-design in FPGA SoC.
Proceedings of the SAC '21: The 36th ACM/SIGAPP Symposium on Applied Computing, 2021

Time-Predictable Acceleration of Deep Neural Networks on FPGA SoC Platforms.
Proceedings of the 42nd IEEE Real-Time Systems Symposium, 2021

A Multi-Domain Software Architecture for Safe and Secure Autonomous Driving.
Proceedings of the 27th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2021

Latency Analysis of I/O Virtualization Techniques in Hypervisor-Based Real-Time Systems.
Proceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium, 2021

Event-Driven Delay-Induced Tasks: Model, Analysis, and Applications.
Proceedings of the 27th IEEE Real-Time and Embedded Technology and Applications Symposium, 2021

Scheduling Replica Voting in Fixed-Priority Real-Time Systems.
Proceedings of the 33rd Euromicro Conference on Real-Time Systems, 2021

Optimal Memory Allocation and Scheduling for DMA Data Transfers under the LET Paradigm.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

X-BaD: A Flexible Tool for Explanation-Based Bias Detection.
Proceedings of the IEEE International Conference on Cyber Security and Resilience, 2021

2020
Timing isolation and improved scheduling of deep neural networks for real-time systems.
Softw. Pract. Exp., 2020

A Safe, Secure, and Predictable Software Architecture for Deep Learning in Safety-Critical Systems.
IEEE Embed. Syst. Lett., 2020

Modeling and Analysis of Bus Contention for Hardware Accelerators in FPGA SoCs (Artifact).
Dagstuhl Artifacts Ser., 2020

Front Matter, Table of Contents, Preface, Conference Organization.
Dagstuhl Artifacts Ser., 2020

Integrating Online Safety-related Memory Tests in Multicore Real-Time Systems.
Proceedings of the 41st IEEE Real-Time Systems Symposium, 2020

A Holistic Memory Contention Analysis for Parallel Real-Time Tasks under Partitioned Scheduling.
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2020

The AMPERE Project: : A Model-driven development framework for highly Parallel and EneRgy-Efficient computation supporting multi-criteria optimization.
Proceedings of the 23rd IEEE International Symposium on Real-Time Distributed Computing, 2020

Safely Preventing Unbounded Delays During Bus Transactions in FPGA-based SoC.
Proceedings of the 28th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2020

Modeling and Analysis of Bus Contention for Hardware Accelerators in FPGA SoCs.
Proceedings of the 32nd Euromicro Conference on Real-Time Systems, 2020

AXI HyperConnect: A Predictable, Hypervisor-level Interconnect for Hardware Accelerators in FPGA SoC.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

Predictable Memory-CPU Co-Scheduling with Support for Latency-Sensitive Tasks.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
FLORA: FLoorplan Optimizer for Reconfigurable Areas in FPGAs.
ACM Trans. Embed. Comput. Syst., 2019

Is Your Bus Arbiter Really Fair? Restoring Fairness in AXI Interconnects for FPGA SoCs.
ACM Trans. Embed. Comput. Syst., 2019

Handling Transients of Dynamic Real-Time Workload Under EDF Scheduling.
IEEE Trans. Computers, 2019

Hierarchical scheduling of real-time tasks over Linux-based virtual machines.
J. Syst. Softw., 2019

Optimizing the Functional Deployment on Multicore Platforms with Logical Execution Time.
Proceedings of the IEEE Real-Time Systems Symposium, 2019

Towards the Hypervision of Hardware-based Control Flow Integrity for Arm Platforms.
Proceedings of the Third Italian Conference on Cyber Security, 2019

Analyses and architectures for mixed-critical systems: industry trends and research perspective.
Proceedings of the International Conference on Embedded Software Companion, 2019

A Bandwidth Reservation Mechanism for AXI-Based Hardware Accelerators on FPGAs.
Proceedings of the 31st Euromicro Conference on Real-Time Systems, 2019

Simple and General Methods for Fixed-Priority Schedulability in Optimization Problems.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

Analyzing Parallel Real-Time Tasks Implemented with Thread Pools.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
Modeling and Analysis of Engine Control Tasks Under Dynamic Priority Scheduling.
IEEE Trans. Ind. Informatics, 2018

Selecting the Transition Speeds of Engine Control Tasks to Optimize the Performance.
ACM Trans. Cyber Phys. Syst., 2018

Response-Time Analysis of Engine Control Applications Under Fixed-Priority Scheduling.
IEEE Trans. Computers, 2018

On the ineffectiveness of 1/m-based interference bounds in the analysis of global EDF and FIFO scheduling.
Real Time Syst., 2018

A design flow for supporting component-based software development in multiprocessor real-time systems.
Real Time Syst., 2018

A survey of schedulability analysis techniques for rate-dependent tasks.
J. Syst. Softw., 2018

Beyond the Weakly Hard Model: Measuring the Performance Cost of Deadline Misses (Artifact).
Dagstuhl Artifacts Ser., 2018

The SRP Resource Sharing Protocol for Self-Suspending Tasks.
Proceedings of the 2018 IEEE Real-Time Systems Symposium, 2018

Partitioned Fixed-Priority Scheduling of Parallel Tasks Without Preemptions.
Proceedings of the 2018 IEEE Real-Time Systems Symposium, 2018

Memory Feasibility Analysis of Parallel Tasks Running on Scratchpad-Based Architectures.
Proceedings of the 2018 IEEE Real-Time Systems Symposium, 2018

Achieving Predictable Multicore Execution of Automotive Applications Using the LET Paradigm.
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2018

Supporting temporal and spatial isolation in a hypervisor for ARM multicore platforms.
Proceedings of the IEEE International Conference on Industrial Technology, 2018

Reconciling security with virtualization: A dual-hypervisor design for ARM TrustZone.
Proceedings of the IEEE International Conference on Industrial Technology, 2018

Beyond the Weakly Hard Model: Measuring the Performance Cost of Deadline Misses.
Proceedings of the 30th Euromicro Conference on Real-Time Systems, 2018

2017
Real-Time Analysis and Design of a Dual Protocol Support for Bluetooth LE Devices.
IEEE Trans. Ind. Informatics, 2017

A Linux-based support for developing real-time applications on heterogeneous platforms with dynamic FPGA reconfiguration.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

Constant bandwidth servers with constrained deadlines.
Proceedings of the 25th International Conference on Real-Time Networks and Systems, 2017

Semi-Partitioned Scheduling of Dynamic Real-Time Workload: A Practical Approach Based on Analysis-Driven Load Balancing.
Proceedings of the 29th Euromicro Conference on Real-Time Systems, 2017

Timing-aware FPGA partitioning for real-time applications under dynamic partial reconfiguration.
Proceedings of the 2017 NASA/ESA Conference on Adaptive Hardware and Systems, 2017

2016
Schedulability Analysis of Hierarchical Real-Time Systems under Shared Resources.
IEEE Trans. Computers, 2016

ARTE: arduino real-time extension for programming multitasking applications.
Proceedings of the 31st Annual ACM Symposium on Applied Computing, 2016

A Blocking Bound for Nested FIFO Spin Locks.
Proceedings of the 2016 IEEE Real-Time Systems Symposium, 2016

A Framework for Supporting Real-Time Applications on Dynamic Reconfigurable FPGAs.
Proceedings of the 2016 IEEE Real-Time Systems Symposium, 2016

Partitioning and Interface Synthesis in Hierarchical Multiprocessor Real-Time Systems.
Proceedings of the 24th International Conference on Real-Time Networks and Systems, 2016

OSEK-Like Kernel Support for Engine Control Applications under EDF Scheduling.
Proceedings of the 2016 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), 2016

Performance-Driven Design of Engine Control Tasks.
Proceedings of the 7th ACM/IEEE International Conference on Cyber-Physical Systems, 2016

Lightweight Real-Time Synchronization under P-EDF on Symmetric and Asymmetric Multiprocessors.
Proceedings of the 28th Euromicro Conference on Real-Time Systems, 2016

Real-time analysis of engine control applications with speed estimation.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015
Response time analysis for G-EDF and G-DM scheduling of sporadic DAG-tasks with arbitrary deadline.
Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015

Resource reservation for real-time self-suspending tasks: theory and practice.
Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015

Dual-protocol support for Bluetooth LE devices.
Proceedings of the 13th IEEE International Conference on Industrial Informatics, 2015

Response-time analysis for real-time tasks in engine control applications.
Proceedings of the ACM/IEEE Sixth International Conference on Cyber-Physical Systems, 2015

Feasibility Analysis of Engine Control Tasks under EDF Scheduling.
Proceedings of the 27th Euromicro Conference on Real-Time Systems, 2015

Supporting Component-Based Development in Partitioned Multiprocessor Real-Time Systems.
Proceedings of the 27th Euromicro Conference on Real-Time Systems, 2015

Engine control: task modeling and analysis.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
Hard Constant Bandwidth Server: Comprehensive formulation and critical scenarios.
Proceedings of the 9th IEEE International Symposium on Industrial Embedded Systems, 2014

Exact Interference of Adaptive Variable-Rate Tasks under Fixed-Priority Scheduling.
Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014

Optimal Design for Reservation Servers under Shared Resources.
Proceedings of the 26th Euromicro Conference on Real-Time Systems, 2014


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