Alessandro Biasci

According to our database, Alessandro Biasci authored at least 6 papers between 2023 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Learning Memory-Contention Timing Models With Automated Platform Profiling.

Andrea Stevanato, Matteo Zini, Alessandro Biondi, Bruno Morelli, Alessandro Biasci

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2024

RT-Mimalloc: A New Look at Dynamic Memory Allocation for Real-Time Systems.

Raffaele Giannessi, Alessandro Biondi, Alessandro Biasci

Proceedings of the 30th IEEE Real-Time and Embedded Technology and Applications Symposium, 2024

2023

Supporting logical execution time in multi-core POSIX systems.

Davide Bellassai, Alessandro Biondi, Alessandro Biasci, Bruno Morelli

J. Syst. Archit., November, 2023

IRQ Coloring and the Subtle Art of Mitigating Interrupt-Generated Interference.

Diogo Costa, Luca Cuomo, Daniel Oliveira, Ida Maria Savino, Bruno Morelli, José Martins, Alessandro Biasci, Sandro Pinto

Proceedings of the 29th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications, 2023

Virtualized DDS Communication for Multi-Domain Systems: Architecture and Performance Evaluation of Design Alternatives.

Andrea Stevanato, Alessandro Biondi, Alessandro Biasci, Bruno Morelli

Proceedings of the 29th IEEE Real-Time and Embedded Technology and Applications Symposium, 2023

IRQ Coloring: Mitigating Interrupt-Generated Interference on ARM Multicore Platforms.

Diogo Costa, Luca Cuomo, Daniel Oliveira, Ida Maria Savino, Bruno Morelli, José Martins, Fabrizio Tronci, Alessandro Biasci, Sandro Pinto

Proceedings of the Fourth Workshop on Next Generation Real-Time Embedded Systems, 2023