Aleksander Slusarczyk

According to our database1, Aleksander Slusarczyk authored at least 10 papers between 2000 and 2008.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2008
High-Quality Circuit Synthesis for Modern Technologies.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2006
Multi-objective Optimal Controller Synthesis for Heterogeneous Embedded Systems.
Proceedings of 2006 International Conference on Embedded Computer Systems: Architectures, 2006

Multi-objective Optimal FSM State Assignment.
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006

2004
General decomposition of incompletely specified sequential machines with multi-state behavior realization.
J. Syst. Archit., 2004

An Effective Solution of Benchmarking Problem FSM Benchmark Generator and Its Application to Analysis of State Assignment Methods.
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004

2003
Fast and compact sequential circuits for the FPGA-based reconfigurable systems.
J. Syst. Archit., 2003

2002
Term Trees in Application to an Effective and Efficient ATPG for AND-EXOR and AND-OR Circuits.
VLSI Design, 2002

Interoperability and Quality of New EDA Tools for Sequential Logic Synthesis.
Proceedings of the 3rd International Symposium on Quality of Electronic Design, 2002

2001
Fast and Compact Sequential Circuits through the Information-Driven Circuit Synthesis.
Proceedings of the Euromicro Symposium on Digital Systems Design 2001 (Euro-DSD 2001), 2001

2000
A New State Assignment Method Targeting FPGA Implementations.
Proceedings of the 26th EUROMICRO 2000 Conference, 2000


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