Alejandro Millán
Orcid: 0000-0002-1788-8574Affiliations:
- University of Seville, Spain
According to our database1,
Alejandro Millán
authored at least 21 papers
between 2002 and 2020.
Collaborative distances:
Collaborative distances:
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Bibliography
2020
EURASIP J. Adv. Signal Process., 2020
2016
2012
Microprocess. Microsystems, 2012
2011
Fast-Convergence Microsecond-Accurate Clock Discipline Algorithm for Hardware Implementation.
IEEE Trans. Instrum. Meas., 2011
Studying the Viability of Static Complementary Metal-Oxide-Semiconductor Gates with a Large Number of Inputs When Using Separate Transistor Wells.
J. Low Power Electron., 2011
2010
Comprehensive Analysis on the Internal Power Dissipation of Static CMOS Cells in Ultra-Deep Sub-Micron Technologies.
J. Low Power Electron., 2010
Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010
2008
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2008
2007
J. Low Power Electron., 2007
Proceedings of the IEEE Second International Symposium on Industrial Embedded Systems, 2007
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007
2006
J. Low Power Electron., 2006
Efficient Design and Implementation on FPGA of a MicroBlaze Peripheral for Processing Direct Electrical Networks Measurements.
Proceedings of the International Symposium on Industrial Embedded Systems, 2006
2005
Proceedings of the Integrated Circuit and System Design, 2005
Application of Internode Model to Global Power Consumption Estimation in SCMOS Gates.
Proceedings of the Integrated Circuit and System Design, 2005
2004
Proceedings of the Integrated Circuit and System Design, 2004
2003
Proceedings of the Integrated Circuit and System Design, 2003
Proceedings of the Proceedings 36th Annual Simulation Symposium (ANSS-36 2003), Orlando, Florida, USA, March 30, 2003
2002
Efficient and Fast Current Curve Estimation of CMOS Digital Circuits at the Logic Level.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002