Alejandro Medina-Santiago

According to our database, Alejandro Medina-Santiago authored at least 13 papers between 2012 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

Multilayer Fuzzy Inference System for Predicting the Risk of Dropping Out of School at the High School Level.

Jorge Antonio Orozco Torres, Alejandro Medina-Santiago, José Manuel Villegas Izaguirre, Salvador Hernández Garduza, Monica Amador García, Gladys Falconi Alejandro

IEEE Access, 2024

Fault Diagnosis for Takagi-Sugeno Model Wind Turbine Pitch System.

Jorge Iván Bermúdez Rodríguez, Héctor-Ricardo Hernandez-de Leon, Juan Anzurez Marín, Alejandro Medina-Santiago, Elías N. Escobar-Gómez, Betty Yolanda López Zapata, Julio Alberto Guzmán-Rabasa

IEEE Access, 2024

2023

Diagnosis and Study of Mechanical Vibrations in Cargo Vehicles Using ISO 2631-1:1997.

Alejandro Medina-Santiago, Jorge Antonio Orozco Torres, Carlos Arturo Hernández-Gracidas, Salvador Hernández Garduza, Javier Duarte Franco

Sensors, December, 2023

2022

Hypertension Diagnosis with Backpropagation Neural Networks for Sustainability in Public Health.

Jorge Antonio Orozco Torres, Alejandro Medina-Santiago, José Manuel Villegas Izaguirre, Monica Amador García, Alberto Delgado Hernández

Sensors, 2022

A SHA-256 Hybrid-Redundancy Hardware Architecture for Detecting and Correcting Errors.

Ignacio Algredo-Badillo, Miguel Morales-Sandoval, Alejandro Medina-Santiago, Carlos Arturo Hernández-Gracidas, Mariana Lobato Báez, Luis Alberto Morales-Rosales

Sensors, 2022

2021

CMOS Implementation of ANNs Based on Analog Optimization of N-Dimensional Objective Functions.

Alejandro Medina-Santiago, Carlos Arturo Hernández-Gracidas, Luis Alberto Morales-Rosales, Ignacio Algredo-Badillo, Monica Amador García, Jorge Antonio Orozco Torres

Sensors, 2021

Intelligent Search of Values for a Controller Using the Artificial Bee Colony Algorithm to Control the Velocity of Displacement of a Robot.

José M. Villegas, Camilo Caraveo, David A. Mejia, José L. Rodríguez, Yuridia Vega, Leticia Cervantes, Alejandro Medina-Santiago

Algorithms, 2021

2020

Digital System Design Using Standard NeuMOS Cells Applied in ADAS.

Alejandro Medina-Santiago, Patricia E. Vera Molina, Mario Alfredo Reyes-Barranca, José Ángel Zepeda-Hernández

Circuits Syst. Signal Process., 2020

Adaptive Model IoT for Monitoring in Data Centers.

Alejandro Medina-Santiago, Ana Dalia Pano-Azucena, José Manuel Gómez-Zea, José Angel Jesús-Magaña, María de la Luz Valdez-Ramos, Eutimio Sosa-Silva, Fernando Falcón-Pérez

IEEE Access, 2020

2019

Reconfigurable arithmetic logic unit designed with threshold logic gates.

Alejandro Medina-Santiago, Mario Alfredo Reyes-Barranca, Ignacio Algredo-Badillo, Alfonso Martinez Cruz, Kelsey A. Ramírez-Gutiérrez, Eleazar Adrián Cortés-Barrón

IET Circuits Devices Syst., 2019

2018

Lightweight Security Hardware Architecture Using DWT and AES Algorithms.

Ignacio Algredo-Badillo, Francisco Rubén Castillo Soria, Kelsey A. Ramírez-Gutiérrez, Luis Alberto Morales-Rosales, Alejandro Medina-Santiago, Claudia Feregrino Uribe

IEICE Trans. Inf. Syst., 2018

2014

An adaptive geometrically-complemented approach for ECG signal denoising.

Luis A. Gordillo, Alejandro Medina-Santiago, José Ángel Zepeda-Hernández, Héctor-Ricardo Hernandez-de Leon, Mario Alfredo Reyes-Barranca

Proceedings of the 11th International Conference on Electrical Engineering, 2014

2012

4-Bit Arithmetic Logic Unit (ALU) based on Neuron MOS Transistors.

Eleazar Adrián Cortés-Barrón, Mario Alfredo Reyes-Barranca, Luis M. Flores-Nava, Alejandro Medina-Santiago

Proceedings of the 9th International Conference on Electrical Engineering, 2012