Alberto Pasini

According to our database1, Alberto Pasini authored at least 2 papers in 2009.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2009
RTL-to-layout implementation of an embedded coarse grained architecture for dynamically reconfigurable computing in systems-on-chip.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009

System on chip with 1.12mW-32Gb/s AC-coupled 3D memory interface.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009


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