Albert Lee

Orcid: 0009-0009-7727-7837

According to our database1, Albert Lee authored at least 39 papers between 1983 and 2024.

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Bibliography

2024
A Read Margin Enhancement Circuit With Dynamic Bias Optimization for MRAM.
IEEE Trans. Circuits Syst. II Express Briefs, August, 2024

Voltage-Controlled Magnetoelectric Devices for Neuromorphic Diffusion Process.
CoRR, 2024

Analyzing the Variations in Emergency Department Boarding and Testing the Transferability of Forecasting Models across COVID-19 Pandemic Waves in Hong Kong: Hybrid CNN-LSTM approach to quantifying building-level socioecological risk.
CoRR, 2024

A 12-bit 75 MS/s Asynchronous SAR ADC with Gain-Boosting Dynamic Comparator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2024

TTLs Matter: Efficient Cache Sizing with TTL-Aware Miss Ratio Curves and Working Set Sizes.
Proceedings of the Nineteenth European Conference on Computer Systems, 2024

2023
Exposure to Multicultural Context Affects Neural Response to Out-Group Faces: A Functional Magnetic Resonance Imaging Study.
Sensors, 2023

Second Language Accent Perception and Language Attitude by Mandarin and Cantonese Speakers in Mainland China.
Proceedings of the 26th Conference of the Oriental COCOSDA International Committee for the Co-ordination and Standardisation of Speech Databases and Assessment Techniques, 2023

2022
Cryogenic in-memory computing using tunable chiral edge states.
CoRR, 2022

A Multi-domain Magneto Tunnel Junction for Racetrack Nanowire Strips.
CoRR, 2022

2021
Max and Coincidence Neurons in Neural Networks.
CoRR, 2021

A Thermodynamic Core using Voltage-Controlled Spin-Orbit-Torque Magnetic Tunnel Junctions.
CoRR, 2021

An Efficient & Programmable FPGA-Based Approach for Fast-Tuning Silicon CPU Design for Embedded Systems.
Proceedings of the IEEE International Conference on Signal Processing, 2021

Force-Sensing Tensegrity for Investigating Physical Human-Robot Interaction in Compliant Robotic Systems.
Proceedings of the IEEE International Conference on Robotics and Automation, 2021

A Calibration-Free In-Memory True Random Number Generator Using Voltage-Controlled MRAM.
Proceedings of the 51st IEEE European Solid-State Device Research Conference, 2021

2020
A 2-D Calibration Scheme for Resistive Nonvolatile Memories.
IEEE Trans. Very Large Scale Integr. Syst., 2020

2019
Use of High Voltage OBIRCH Fault Isolation Technique in Failure Analysis of High Voltage IC's.
Proceedings of the IEEE International Reliability Physics Symposium, 2019

2018
A Dual-Data Line Read Scheme for High-Speed Low-Energy Resistive Nonvolatile Memories.
IEEE Trans. Very Large Scale Integr. Syst., 2018

Orthographic effects on the perception and production of L2 mandarin tones.
Speech Commun., 2018

A Basic Phase Diagram of Neuronal Dynamics.
Neural Comput., 2018

Conditional Activation for Diverse Neurons in Heterogeneous Networks.
CoRR, 2018

2017
A Word Line Pulse Circuit Technique for Reliable Magnetoelectric Random Access Memory.
IEEE Trans. Very Large Scale Integr. Syst., 2017

Pre-Low Raising in Japanese Pitch Accent.
Phonetica, 2017

A 65-nm ReRAM-Enabled Nonvolatile Processor With Time-Space Domain Adaption and Self-Write-Termination Achieving > 4× Faster Clock Frequency and > 6× Higher Restore Speed.
IEEE J. Solid State Circuits, 2017

A ReRAM-Based Nonvolatile Flip-Flop With Self-Write-Termination Scheme for Frequent-OFF Fast-Wake-Up Nonvolatile Processors.
IEEE J. Solid State Circuits, 2017

A 3T1R Nonvolatile TCAM Using MLC ReRAM for Frequent-Off Instant-On Filters in IoT and Big-Data Processing.
IEEE J. Solid State Circuits, 2017

2016
Universal vs. language-specific aspects in human vocal attractiveness: An investigation towards Japanese native listeners' perceptual pattern.
Proc. Meet. Acoust., 2016

4.7 A 65nm ReRAM-enabled nonvolatile processor with 6× reduction in restore time and 4× higher clock frequency using adaptive data retention and self-write-termination nonvolatile logic.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Cardiovascular Risk Predictors Estimation via Carotid Tonometry and Ankle Cuff Oscillation Measurement.
Proceedings of the First IEEE International Conference on Connected Health: Applications, 2016

2015
Challenges and Circuit Techniques for Energy-Efficient On-Chip Nonvolatile Memory Using Memristive Devices.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2015

RRAM-based 7T1R nonvolatile SRAM with 2x reduction in store energy and 94x reduction in restore energy for frequent-off instant-on applications.
Proceedings of the Symposium on VLSI Circuits, 2015

An embedded ReRAM using a small-offset sense amplifier for low-voltage operations.
Proceedings of the VLSI Design, Automation and Test, 2015

17.5 A 3T1R nonvolatile TCAM using MLC ReRAM with Sub-1ns search time.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Modelling Japanese intonation using PENTAtrainer2.
Proceedings of the 18th International Congress of Phonetic Sciences, 2015

Long-distance anticipatory vowel-to-vowel assimilatory effects in French and Japanese.
Proceedings of the 18th International Congress of Phonetic Sciences, 2015

Read circuits for resistive memory (ReRAM) and memristor-based nonvolatile Logics.
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015

2013
Mora-based pre-low raising in Japanese pitch accent.
Proceedings of the 14th Annual Conference of the International Speech Communication Association, 2013

2009
Discovery of Association Rules in National Violent Death Data Using Optimization of Number of Attributes.
Proceedings of the CSIE 2009, 2009 WRI World Congress on Computer Science and Information Engineering, March 31, 2009

1998
Evaluation of ordering strategies for constraint satisfaction reactive scheduling.
Decis. Support Syst., 1998

1983
Integrating the personal computer into the university computing center environment: "A marriage of necessity!".
Proceedings of the 11th annual ACM SIGUCCS conference on User services, 1983


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