Albert E. Ruehli

According to our database1, Albert E. Ruehli authored at least 32 papers between 1973 and 2024.

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Awards

IEEE Fellow

IEEE Fellow 1984, "For key contributions to the field of computer-aided design.".

Timeline

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Bibliography

2024
A Low-Frequency-Stable Higher-Order Spline-Based Integral Equation Method.
CoRR, 2024

Suppression of Power Distribution Network PCB-Package Resonance for Low Target Impedance.
Proceedings of the 14th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, 2024

2022
A Spline-based Partial Element Equivalent Circuit Method for Electrostatics.
CoRR, 2022

2020
Asymptotic Analysis for Overlap in Waveform Relaxation Methods for RC Type Circuits.
J. Sci. Comput., 2020

Cagniard-DeHoop Technique-Based Computation of Retarded Partial Coefficients: The Coplanar Case.
IEEE Access, 2020

2014
Optimization of Transmission Conditions in Waveform Relaxation Techniques for RC Circuits.
SIAM J. Numer. Anal., 2014

2013
Skin-Effect Loss Models for Time- and Frequency-Domain PEEC Solver.
Proc. IEEE, 2013

2010
Corrections to Optimized Waveform Relaxation Methods for Longitudinal Partitioning of Transmission Lines [Aug 09 1732-1743].
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

2009
Optimized Waveform Relaxation Methods for Longitudinal Partitioning of Transmission Lines.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

2007
Speeding Up PEEC Partial Inductance Computations Using a QR-Based Algorithm.
IEEE Trans. Very Large Scale Integr. Syst., 2007

2004
Optimized waveform relaxation methods for RC type circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004

2003
Fast Multipole and Multifunction PEEC Methods.
IEEE Trans. Mob. Comput., 2003

2002
An overview of the BlueGene/L Supercomputer.
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Proceedings of the 2002 ACM/IEEE conference on Supercomputing, 2002

2001
Full-wave PEEC time-domain method for the modeling of on-chipinterconnects.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

Progress in the methodologies for the electrical modeling of interconnects and electronic packages.
Proc. IEEE, 2001

Multi-GHz interconnect effects in microprocessors.
Proceedings of the 2001 International Symposium on Physical Design, 2001

1999
Dealing with Inductance in High-Speed Chip Design.
Proceedings of the 36th Conference on Design Automation, 1999

1997
Circuit-Based Description and Modeling of Electromagnetic Noise Effects in Packaged Low-Power Electronics.
Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1993
Simulating 3-D retarded interconnect models using complex frequency hopping (CFH).
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Frequency Domain Microwave Modeling Using Retarded Partial Element Equivalent Circuits.
Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992
Three Dimensional Circuit Oriented Electromagnetic Modeling for VLSI Interconnects.
Proceedings of the Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1992

Challenges and Advances in Electrical Interconnect Analysis.
Proceedings of the 29th Design Automation Conference, 1992

Parallel Waveform Relaxation of Circuits with Global Feedback Loops.
Proceedings of the 29th Design Automation Conference, 1992

1991
Retarded Models for PC Board Interconnects - Or How the Speed of Light Affects your SPICE Circuit Simulation.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

1990
Approximate time-domain models of three-dimensional interconnects.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

Measuring Error Propagation in Waveform Relaxation Algorithms.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

Simulating Electromagnetic Radiation of Printed Circuit Boards.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1982
The Waveform Relaxation Method for Time-Domain Analysis of Large Scale Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1982

1981
Survey of analysis, simulation and modeling for large scale logic circuits.
Proceedings of the 18th Design Automation Conference, 1981

1977
Analytical power/timing optimization technique for digital system.
Proceedings of the 14th Design Automation Conference, 1977

An experimental system for power/timing optimization of LSI chips.
Proceedings of the 14th Design Automation Conference, 1977

1973
Electrical considerations in the computer aided design of logic circuit interconnections.
Proceedings of the 10th Design Automation Workshop, 1973


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