Alan W. L. Ng

According to our database, Alan W. L. Ng authored at least 8 papers between 2006 and 2017.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2017

A 0.9-5.8-GHz Software-Defined Receiver RF Front-End With Transformer-Based Current-Gain Boosting and Harmonic Rejection Calibration.

Liang Wu, Alan W. L. Ng, Shiyuan Zheng, Hiu Fai Leung, Yue Chao, Alvin Li, Howard C. Luong

IEEE Trans. Very Large Scale Integr. Syst., 2017

2013

A 0.9GHz-5.8GHz SDR receiver front-end with transformer-based current-gain boosting and 81-dB 3rd-order-harmonic rejection ratio.

Alan W. L. Ng, S. Y. Zheng, H. Leung, Y. Chao, Howard C. Luong

Proceedings of the ESSCIRC 2013, 2013

2012

A 4.1GHz-6.5GHz all-digital frequency synthesizer with a 2^nd-order noise-shaping TDC and a transformer-coupled QVCO.

Alan W. L. Ng, Shiyuan Zheng, Howard C. Luong

Proceedings of the 38th European Solid-State Circuit conference, 2012

2009

0.9mW 7GHz and 1.6mW 60GHz frequency dividers with locking-range enhancement in 0.13µm CMOS.

Sujiang Rong, Alan W. L. Ng, Howard C. Luong

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2007

A 1-V 17-GHz 5-mW CMOS Quadrature VCO Based on Transformer Coupling.

Alan W. L. Ng, Howard C. Luong

IEEE J. Solid State Circuits, 2007

A 1-V 86-mW-RX 53-mW-TX Single-Chip CMOS Transceiver for WLAN IEEE 802.11a.

Lincoln Lai Kan Leung, Dennis M. C. Lau, Shuzuo Lou, Alan W. L. Ng, Rachel Dan Wang, Gary Wing-Kei Wong, Patrick Y. Wu, Hui Zheng, Vincent Sin-Luen Cheung, Howard C. Luong

IEEE J. Solid State Circuits, 2007

2006

A 1-V 24-GHz 17.5-mW phase-locked loop in a 0.18-μm CMOS process.

Alan W. L. Ng, Gerry C. T. Leung, Ka-Chun Kwok, Lincoln Lai Kan Leung, Howard C. Luong

IEEE J. Solid State Circuits, 2006

A 1V 17GHz 5mW Quandrature CMOS VCO based on transformer coupling.

Alan W. L. Ng, Howard Cam Luong

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006