Alan Chang
According to our database1,
Alan Chang
authored at least 15 papers
between 2005 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
2018
IEEE Trans. Very Large Scale Integr. Syst., 2018
An ADPLL-Based PSK Receiver for VHBR 13.56-MHz Contactless Smartcards and NFC Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2018
A 0.4-V, 0.138-fJ/Cycle Single-Phase-Clocking Redundant-Transition-Free 24T Flip-Flop With Change-Sensing Scheme in 40-nm CMOS.
IEEE J. Solid State Circuits, 2018
2017
Library pruning and sigma corner libraries for power efficient variation tolerant processor pipelines.
Proceedings of the 2017 IFIP/IEEE International Conference on Very Large Scale Integration, 2017
An 82% energy-saving change-sensing flip-flop in 40nm CMOS for ultra-low power applications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017
2016
Power and area efficient clock stretching and critical path reshaping for error resilience.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016
Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016
2015
Slack-aware timing margin redistribution technique utilizing error avoidance flip-flops and time borrowing.
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015
2009
IEEE J. Solid State Circuits, 2009
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2005
Proceedings of the 19th International Conference on Advanced Information Networking and Applications (AINA 2005), 2005
Proceedings of the 19th International Conference on Advanced Information Networking and Applications (AINA 2005), 2005