Alaa R. Alameldeen

According to our database, Alaa R. Alameldeen authored at least 42 papers between 2000 and 2022.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2022

Guest Editors' Introduction: Near-Memory and In-Memory Processing.

Hai Li, Alaa R. Alameldeen, Onur Mutlu

IEEE Des. Test, 2022

2021

Improving Streaming Graph Processing Performance using Input Knowledge.

Abanti Basak, Zheng Qu, Jilan Lin, Alaa R. Alameldeen, Zeshan Chishti, Yufei Ding, Yuan Xie

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Speculative interference attacks: breaking invisible speculation schemes.

Mohammad Behnia, Prateek Sahu, Riccardo Paccagnella, Jiyong Yu, Zirui Neil Zhao, Xiang Zou, Thomas Unterluggauer, Josep Torrellas, Carlos V. Rozas, Adam Morrison, Frank McKeen, Fangfei Liu, Ron Gabor, Christopher W. Fletcher, Abhishek Basak, Alaa R. Alameldeen

Proceedings of the ASPLOS '21: 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2021

2020

SAGA-Bench: Software and Hardware Characterization of Streaming Graph Analytics Workloads.

Abanti Basak, Jilan Lin, Ryan Lorica, Xinfeng Xie, Zeshan Chishti, Alaa R. Alameldeen, Yuan Xie

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2020

Compact Leakage-Free Support for Integrity and Reliability.

Meysam Taassori, Rajeev Balasubramonian, Siddhartha Chhabra, Alaa R. Alameldeen, Manjula Peddireddy, Rajat Agarwal, Ryan Stutsman

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

2019

A Case For Asymmetric Processing in Memory.

Berkin Akin, Alaa R. Alameldeen

IEEE Comput. Archit. Lett., 2019

ZCOMP: Reducing DNN Cross-Layer Memory Footprint Using Vector Extensions.

Berkin Akin, Zeshan A. Chishti, Alaa R. Alameldeen

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

2018

Reducing DRAM Refresh Overheads with Refresh-Access Parallelism.

Kevin K. Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu

CoRR, 2018

CompressPoints: An Evaluation Methodology for Compressed Memory Systems.

Esha Choukse, Mattan Erez, Alaa R. Alameldeen

IEEE Comput. Archit. Lett., 2018

CHAMELEON: A Dynamically Reconfigurable Heterogeneous Memory System.

Jagadish B. Kotra, Haibo Zhang, Alaa R. Alameldeen, Chris Wilkerson, Mahmut T. Kandemir

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

Compresso: Pragmatic Main Memory Compression.

Esha Choukse, Mattan Erez, Alaa R. Alameldeen

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

Opportunistic compression for direct-mapped DRAM caches.

Alaa R. Alameldeen, Rajat Agarwal

Proceedings of the International Symposium on Memory Systems, 2018

2017

Improving DRAM Performance by Parallelizing Refreshes with Accesses.

Kevin K. Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu

CoRR, 2017

A Case for Memory Content-Based Detection and Mitigation of Data-Dependent Failures in DRAM.

Samira Manabi Khan, Chris Wilkerson, Donghyuk Lee, Alaa R. Alameldeen, Onur Mutlu

IEEE Comput. Archit. Lett., 2017

Detecting and mitigating data-dependent DRAM failures by exploiting current memory content.

Samira Manabi Khan, Chris Wilkerson, Zhe Wang, Alaa R. Alameldeen, Donghyuk Lee, Onur Mutlu

Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Probabilistic replacement strategies for improving the lifetimes of NVM-based caches.

Elizabeth Reed, Alaa R. Alameldeen, Helia Naeimi, Patrick Stolt

Proceedings of the International Symposium on Memory Systems, 2017

2016

Reducing Performance Impact of DRAM Refresh by Parallelizing Refreshes with Accesses.

Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu

CoRR, 2016

Base-Victim Compression: An Opportunistic Cache Compression Architecture.

Jayesh Gaur, Alaa R. Alameldeen, Sreenivas Subramoney

Proceedings of the 43rd ACM/IEEE Annual International Symposium on Computer Architecture, 2016

2014

The efficacy of error mitigation techniques for DRAM retention failures: a comparative experimental study.

Samira Manabi Khan, Donghyuk Lee, Yoongu Kim, Alaa R. Alameldeen, Chris Wilkerson, Onur Mutlu

Proceedings of the ACM SIGMETRICS / International Conference on Measurement and Modeling of Computer Systems, 2014

Transparent Hardware Management of Stacked DRAM as Part of Memory.

Jaewoong Sim, Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Hyesoon Kim

Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture, 2014

Improving cache performance using read-write partitioning.

Samira Manabi Khan, Alaa R. Alameldeen, Chris Wilkerson, Onur Mutlu, Daniel A. Jiménez

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

Improving DRAM performance by parallelizing refreshes with accesses.

Kevin Kai-Wei Chang, Donghyuk Lee, Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Yoongu Kim, Onur Mutlu

Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture, 2014

2013

Improving multi-core performance using mixed-cell cache architecture.

Samira Manabi Khan, Alaa R. Alameldeen, Chris Wilkerson, Jaydeep Kulkarni, Daniel A. Jiménez

Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013

2012

Redundancy and ECC mechanisms to improve energy efficiency of on-die interconnects.

Amr Helmy, Alaa R. Alameldeen

Proceedings of the International Conference on Energy Aware Computing, 2012

2011

Adaptive Cache Design to Enable Reliable Low-Voltage Operation.

Alaa R. Alameldeen, Zeshan Chishti, Chris Wilkerson, Wei Wu, Shih-Lien Lu

IEEE Trans. Computers, 2011

Guest Editor's Introduction.

Alaa R. Alameldeen

J. Instr. Level Parallelism, 2011

Energy-efficient cache design using variable-strength error-correcting codes.

Alaa R. Alameldeen, Ilya Wagner, Zeshan Chishti, Wei Wu, Chris Wilkerson, Shih-Lien Lu

Proceedings of the 38th International Symposium on Computer Architecture (ISCA 2011), 2011

2010

Reducing cache power with low-cost, multi-bit error-correcting codes.

Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chishti, Wei Wu, Dinesh Somasekhar, Shih-Lien Lu

Proceedings of the 37th International Symposium on Computer Architecture (ISCA 2010), 2010

2009

Impact of Die-to-Die and Within-Die Parameter Variations on the Clock Frequency and Throughput of Multi-Core Processors.

Keith A. Bowman, Alaa R. Alameldeen, Srikanth T. Srinivasan, Chris Wilkerson

IEEE Trans. Very Large Scale Integr. Syst., 2009

Trading Off Cache Capacity for Low-Voltage Operation.

Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah, Shih-Lien Lu

IEEE Micro, 2009

Improving cache lifetime reliability at ultra-low voltages.

Zeshan Chishti, Alaa R. Alameldeen, Chris Wilkerson, Wei Wu, Shih-Lien Lu

Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

2008

Trading off Cache Capacity for Reliability to Enable Low Voltage Operation.

Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah, Shih-Lien Lu

Proceedings of the 35th International Symposium on Computer Architecture (ISCA 2008), 2008

2007

Impact of die-to-die and within-die parameter variations on the throughput distribution of multi-core processors.

Keith A. Bowman, Alaa R. Alameldeen, Srikanth T. Srinivasan, Chris Wilkerson

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

Interactions Between Compression and Prefetching in Chip Multiprocessors.

Alaa R. Alameldeen, David A. Wood

Proceedings of the 13st International Conference on High-Performance Computer Architecture (HPCA-13 2007), 2007

2006

IPC Considered Harmful for Multiprocessor Workloads.

Alaa R. Alameldeen, David A. Wood

IEEE Micro, 2006

2005

Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset.

Milo M. K. Martin, Daniel J. Sorin, Bradford M. Beckmann, Michael R. Marty, Min Xu, Alaa R. Alameldeen, Kevin E. Moore, Mark D. Hill, David A. Wood

SIGARCH Comput. Archit. News, 2005

2004

Adaptive Cache Compression for High-Performance Processors.

Alaa R. Alameldeen, David A. Wood

Proceedings of the 31st International Symposium on Computer Architecture (ISCA 2004), 2004

2003

Addressing Workload Variability in Architectural Simulations.

Alaa R. Alameldeen, David A. Wood

IEEE Micro, 2003

Simulating a $2M Commercial Server on a $2K PC.

Alaa R. Alameldeen, Milo M. K. Martin, Carl J. Mauer, Kevin E. Moore, Min Xu, Mark D. Hill, David A. Wood, Daniel J. Sorin

Computer, 2003

Variability in Architectural Simulations of Multi-Threaded Workloads.

Alaa R. Alameldeen, David A. Wood

Proceedings of the Ninth International Symposium on High-Performance Computer Architecture (HPCA'03), 2003

2001

Estimating the Selectivity of XML Path Expressions for Internet Scale Applications.

Ashraf Aboulnaga, Alaa R. Alameldeen, Jeffrey F. Naughton

Proceedings of the VLDB 2001, 2001

2000

Timestamp snooping: an approach for extending SMPs.

Milo M. K. Martin, Daniel J. Sorin, Anastassia Ailamaki, Alaa R. Alameldeen, Ross M. Dickson, Carl J. Mauer, Kevin E. Moore, Manoj Plakal, Mark D. Hill, David A. Wood

Proceedings of the ASPLOS-IX Proceedings of the 9th International Conference on Architectural Support for Programming Languages and Operating Systems, 2000