Akshay Jayaraj

Orcid: 0000-0002-6571-6347

According to our database1, Akshay Jayaraj authored at least 11 papers between 2019 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

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Bibliography

2021
Fully Integrated Analog Machine Learning Classifier Using Custom Activation Function for Low Resolution Image Classification.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

33-200Mbps, 3pJ/Bit True Random Number Generator Based on CT Delta-Sigma Modulator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
0.6-1.2 V, 0.22 pJ/bit True Random Number Generator Based on SAR ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2020

76-dB DR, 48 fJ/Step Second-Order VCO-Based Current-to-Digital Converter.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

Neural Networks for Authenticating Integrated Circuits Based on Intrinsic Nonlinearity.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

2019
Highly Digital Second-Order $\Delta\Sigma$ VCO ADC.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Maximum Likelihood Estimation-Based SAR ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2019

Common-Source Amplifier Based Analog Artificial Neural Network Classifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

0.43nJ, 0.48pJ/step Second-Order ΔΣ Current-to-Digital Converter for IoT Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Ultra-Low Power Analog Multiplier Based on Translinear Principle.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

8.6fJ/step VCO-Based CT 2<sup>nd</sup>-Order $\Delta\Sigma$ ADC.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2019


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