Akram Reza

Orcid: 0000-0003-3853-2734

According to our database1, Akram Reza authored at least 24 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2024
Thermal-aware application mapping using genetic and fuzzy logic techniques for minimizing temperature in three-dimensional network-on-chip.
J. Supercomput., May, 2024

Lightweight Certificateless Signcryption Scheme Using Type-3 Pairing on Elliptic Curve.
Wirel. Pers. Commun., April, 2024

2023
Deep learning-based collaborative filtering recommender systems: a comprehensive and systematic review.
Neural Comput. Appl., December, 2023

Low-cost regional-based congestion-aware routing algorithm for 2D mesh NoC.
Int. J. Commun. Syst., 2023

2022
MCPS: a mapping method for MAERI accelerator base on Cartesian Product based Convolution for DNN layers with sparse input feature map.
Clust. Comput., 2022

2021
Enhanced path planning for automated nanites drug delivery based on reinforcement learning and polymorphic improved ant colony optimization.
J. Supercomput., 2021

A fuzzy integrated congestion-aware routing algorithm for network on chip.
Frontiers Inf. Technol. Electron. Eng., 2021

Online multi-job mapping for photonic network on a chip design using partial migrations.
Clust. Comput., 2021

An accurate model to predict the performance of graphical processors using data mining and regression theory.
Comput. Electr. Eng., 2021

2020
A Multi-factor User Authentication and Key Agreement Protocol Based on Bilinear Pairing for the Internet of Things.
Wirel. Pers. Commun., 2020

Comprehensive regression-based model to predict performance of general-purpose graphics processing unit.
Clust. Comput., 2020

CACBR: Congestion Aware Cluster Buffer base routing algorithm with minimal cost on NOC.
CCF Trans. High Perform. Comput., 2020

2019
Decreasing latency considering power consumption issue in silicon interposer-based network-on-chip.
J. Supercomput., 2019

An expandable topology with low wiring congestion for silicon interposer-based network-on-chip systems.
Trans. Emerg. Telecommun. Technol., 2019

2017
Limited contiguous processor allocation mechanism in the mesh-connected multiprocessors using compaction.
J. Supercomput., 2017

Online multi-application mapping in photonic Network-on-Chip with mesh topology.
Opt. Switch. Netw., 2017

Non-preemptive offline multi-job mapping for a photonic network on a chip.
Nano Commun. Networks, 2017

2016
Performance evaluation of task migration in contiguous allocation for mesh interconnection topology.
J. Supercomput., 2016

Loss-Aware Switch Design and Non-Blocking Detection Algorithm for Intra-Chip Scale Photonic Interconnection Networks.
IEEE Trans. Computers, 2016

2014
A loss aware scalable topology for photonic on chip interconnection networks.
J. Supercomput., 2014

2012
PathAware: A contention-aware selection function for application-specific Network-On-Chips.
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012

CoolMap: A Thermal-Aware Mapping Algorithm for Application Specific Networks-on-Chip.
Proceedings of the 15th Euromicro Conference on Digital System Design, 2012

2011
Yield modeling and yield-aware mapping for application specific networks-on-chip.
Proceedings of the 2011 NORCHIP, Lund, Sweden, November 14-15, 2011, 2011

2010
Elixir: A new bandwidth-constrained mapping for Networks-on-chip.
IEICE Electron. Express, 2010


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