Akira Umezawa

According to our database, Akira Umezawa authored at least 6 papers between 1994 and 2005.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2005

PlusDBG: Web Community Extraction Scheme Improving Both Precision and Pseudo-Recall.

Naoyuki Saida, Akira Umezawa, Hayato Yamana

Proceedings of the Web Technologies Research and Development - APWeb 2005, 7th Asia-Pacific Web Conference, Shanghai, China, March 29, 2005

2002

A 44-mm² four-bank eight-word page-read 64-Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller.

Toru Tanzawa, Akira Umezawa, Tadayuki Taura, Hitoshi Shiga, Tokumasa Hara, Yoshinori Takano, Takeshi Miyaba, Naoya Tokiwa, Kentaro Watanabe, Hiroshi Watanabe, Kazunori Masuda, Kiyomi Naruke, Hideo Kato, Shigeru Atsumi

IEEE J. Solid State Circuits, 2002

2001

Wordline voltage generating system for low-power low-voltage flash memories.

Toru Tanzawa, Akira Umezawa, Masao Kuriyama, Tadayuki Taura, Hironori Banba, Takeshi Miyaba, Hitoshi Shiga, Yoshinori Takano, Shigeru Atsumi

IEEE J. Solid State Circuits, 2001

2000

A channel-erasing 1.8-V-only 32-Mb NOR flash EEPROM with a bitline direct sensing scheme.

Shigeru Atsumi, Akira Umezawa, Tooru Tanzawa, Tadayuki Taura, Hitoshi Shiga, Yoshinori Takano, Takeshi Miyaba, Michiharu Matsui, Hiroshi Watanabe, Kazuaki Isobe, Shota Kitamura, Seiji Yamada, Masanobu Saito, Seiichi Mori, Toshiharu Watanabe

IEEE J. Solid State Circuits, 2000

1999

A CMOS bandgap reference circuit with sub-1-V operation.

Hironori Banba, Hitoshi Shiga, Akira Umezawa, Takeshi Miyaba, Toru Tanzawa, Shigeru Atsumi, Koji Sakui

IEEE J. Solid State Circuits, 1999

1994

A 16-Mb flash EEPROM with a new self-data-refresh scheme for a sector erase operation.

Shigeru Atsumi, Masao Kuriyama, Akira Umezawa, Hironori Banba, Kiyomi Naruke, Seiji Yamada, Yoichi Ohshima, Masamitsu Oshikiri, Yohei Hiura, Tomoko Yamane, Kuniyoshi Yoshikawa

IEEE J. Solid State Circuits, April, 1994