Akira Tanabe
According to our database1,
Akira Tanabe
authored at least 12 papers
between 1992 and 2015.
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Timeline
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2015
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Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2015
Proceedings of the Symposium on VLSI Circuits, 2015
Proceedings of the RoboCup 2015: Robot World Cup XIX [papers from the 19th Annual RoboCup International Symposium, 2015
2011
A Novel Variable Inductor Using a Bridge Circuit and Its Application to a 5-20 GHz Tunable LC-VCO.
IEEE J. Solid State Circuits, 2011
2009
A 40 Gb/s Multi-Data-Rate CMOS Transmitter and Receiver Chipset With SFI-5 Interface for Optical Transmission Systems.
IEEE J. Solid State Circuits, 2009
A 40Gb/s multi-data-rate CMOS transceiver chipset with SFI-5 interface for optical transmission systems.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009
2006
A Novel Monitoring Method of RF Characteristics Variations for Sub-0.1μm MOSFETs with Precise Gate-resistance Model.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, 2006
2003
IEEE J. Solid State Circuits, 2003
2001
0.18- μm CMOS 10-Gb/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold voltage fluctuation.
IEEE J. Solid State Circuits, 2001
Proceedings of ASP-DAC 2001, 2001
1998
A single-chip 2.4-Gb/s CMOS optical receiver IC with low substrate cross-talk preamplifier.
IEEE J. Solid State Circuits, 1998
1996
2.8-Gb/s 176-mW byte-interleaved and 3.0-Gb/s 118-mW bit-interleaved 8: 1 multiplexers with a 0.15-μm CMOS technology.
IEEE J. Solid State Circuits, 1996
1992
IEEE J. Solid State Circuits, November, 1992