Akihiko Shinya
According to our database1,
Akihiko Shinya
authored at least 25 papers
between 2011 and 2022.
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Bibliography
2022
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2022
Optoelectronic Implementation of Compact and Power-efficient Recurrent Neural Networks.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2022
Power-aware pruning for ultrafast, energy-efficient, and accurate optical neural network design.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
A Synthesis Method Based on Multi-Stage Optimization for Power-Efficient Integrated Optical Logic Circuits.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021
Neural Network Calculations at the Speed of Light Using Optical Vector-Matrix Multiplication and Optoelectronic Activation.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
2020
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2020
A Synthesis Method for Power-Efficient Integrated Optical Logic Circuits Towards Light Speed Processing.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020
Proceedings of the International Conference on Rebooting Computing, 2020
2019
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2019
An Optical Neural Network Architecture based on Highly Parallelized WDM-Multiplier-Accumulator.
Proceedings of the 2019 IEEE/ACM Workshop on Photonics-Optics Technology Oriented Networking, 2019
Proceedings of the 2nd International Symposium on Devices, Circuits and Systems, 2019
BDD-based synthesis of optical logic circuits exploiting wavelength division multiplexing.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019
2018
ACM J. Emerg. Technol. Comput. Syst., 2018
Proceedings of the 2018 20th International Conference on Transparent Optical Networks (ICTON), 2018
An Integrated Optical Parallel Multiplier Exploiting Approximate Binary Logarithms Towards Light Speed Data Processing.
Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018
Multi-Level Optimization for Large Fan-In Optical Logic Circuits Using Integrated Nanophotonics.
Proceedings of the 2018 IEEE International Conference on Rebooting Computing, 2018
Proceedings of the European Conference on Optical Communication, 2018
2016
An integrated optical parallel adder as a first step towards light speed data processing.
Proceedings of the International SoC Design Conference, 2016
2014
Ultralow-power and integrated operation of all-optical switches/memories in a photonic crystal chip.
Proceedings of the 16th International Conference on Transparent Optical Networks, 2014
25-Gbit/s direct modulation of photonic-crystal lasers with a 10.5-fJ/bit energy cost for on/off-chip optical interconnects.
Proceedings of the European Conference on Optical Communication, 2014
2013
IEICE Electron. Express, 2013
Integrated on-chip optical links using photonic-crystal lasers and photodetectors with current blocking trenches.
Proceedings of the 2013 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference (OFC/NFOEC), 2013
2012
High-Temperature Operation of Photonic-Crystal Lasers for On-Chip Optical Interconnection.
IEICE Trans. Electron., 2012
2011
Low-power nanophotonic devices based on photonic crystals towards dense photonic network on chip.
IET Circuits Devices Syst., 2011