Ajeya Naithani
Orcid: 0000-0002-8291-4230
According to our database1,
Ajeya Naithani
authored at least 11 papers
between 2017 and 2024.
Collaborative distances:
Collaborative distances:
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Bibliography
2024
IEEE Micro, 2024
2023
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
2022
VMT: Virtualized Multi-Threading for Accelerating Graph Workloads on Commodity Processors.
IEEE Trans. Computers, 2022
ACM Trans. Archit. Code Optim., 2022
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2022
2021
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
2020
Proceedings of the PACT '20: International Conference on Parallel Architectures and Compilation Techniques, 2020
2019
2018
Optimizing Soft Error Reliability Through Scheduling on Heterogeneous Multicore Processors.
IEEE Trans. Computers, 2018
2017
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017