Ajay Kumar
Orcid: 0000-0001-8043-8253Affiliations:
- Delhi Technological University, India
According to our database1,
Ajay Kumar
authored at least 8 papers
between 2014 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2024
Performance Assessment of High-k SOI GaN FinFET with Different Fin Aspect Ratio for RF/Wireless Applications.
Wirel. Pers. Commun., May, 2024
2023
Wirel. Pers. Commun., October, 2023
2020
Numerical simulation and parametric assessment of GaN buffered trench gate MOSFET for low power applications.
IET Circuits Devices Syst., 2020
2019
Carbon Nanotube Recessed Channel (CNT-RC) MOSFET for High Linearity/ULSI Applications.
Proceedings of the TENCON 2019, 2019
Non-Quasi-Static Small-Signal Modeling of TGRC MOSFET in Parameter Perspective for RF/Microwave Applications.
Proceedings of the 8th International Conference on Modern Circuits and Systems Technologies, 2019
2018
Temperature Reliability of Junctionless Twin Gate Recessed Channel (JL-TGRC) MOSFET with Different Gate Material for Low Power Digital-Logic Applications.
Proceedings of the TENCON 2018, 2018
2016
Microelectron. J., 2016
2014
Impact of Channel Doping and Gate Length on Small Signal Behaviour of Gate Electrode Workfunction Engineered Silicon Nanowire MOSFET at THz Frequency.
Proceedings of the 2014 Fifth International Symposium on Electronic System Design, 2014