Aitzol Zuloaga

According to our database, Aitzol Zuloaga authored at least 36 papers between 1998 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

AXI Lite Redundant On-Chip Bus Interconnect for High Reliability Systems.

Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, José Ángel Araujo, Jaime Jiménez

IEEE Trans. Reliab., March, 2024

2022

Data content scrubbing approach for SRAM based FPGA designs.

Julen Gomez-Cornejo, Igor Villalta, Itxaso Aranzabal, Iraide Lopez, Aitzol Zuloaga

Proceedings of the 31st IEEE International Symposium on Industrial Electronics, 2022

2017

A novel BRAM content accessing and processing method based on FPGA configuration bitstream.

Julen Gomez-Cornejo, Aitzol Zuloaga, Igor Villalta, Javier Del Ser, Uli Kretzschmar, Jesús Lázaro

Microprocess. Microsystems, 2017

2016

Intelligent gateway for Industry 4.0-compliant production.

Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga, Jesús Lázaro

Proceedings of the IECON 2016, 2016

2015

PRP and HSR for High Availability Networks in Power Utility Automation: A Method for Redundant Frames Discarding.

José Ángel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Jose Ignacio Garate

IEEE Trans. Smart Grid, 2015

2014

Cost-effective redundancy for ethernet train communications using HSR.

Aitzol Zuloaga, Armando Astarloa, Jaime Jimenez, Jesús Lázaro, Jose Angel Araujo

Proceedings of the 23rd IEEE International Symposium on Industrial Electronics, 2014

2013

Fast context reloading lockstep approach for SEUs mitigation in a FPGA soft core processor.

Julen Gomez-Cornejo, Aitzol Zuloaga, Uli Kretzschmar, Unai Bidarte, Jaime Jimenez

Proceedings of the IECON 2013, 2013

System-on-Chip implementation of Reliable Ethernet Networks nodes.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Mikel Idirin

Proceedings of the IECON 2013, 2013

Duplicate and circulating frames discard methods for PRP and HSR (IEC62439-3).

José Ángel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Naiara Moreira

Proceedings of the IECON 2013, 2013

PRP and HSR version 1 (IEC 62439-3 Ed.2), improvements and a prototype implementation.

José Ángel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Alain García

Proceedings of the IECON 2013, 2013

2012

High availability automation networks: PRP and HSR ring implementations.

Jose Angel Araujo, Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Alain García

Proceedings of the 21st IEEE International Symposium on Industrial Electronics, 2012

2011

I2CSec: A secure serial Chip-to-Chip communication protocol.

Jesús Lázaro, Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, Jaime Jimenez

J. Syst. Archit., 2011

NoCmodel: An extensible framework for Network-on-Chips modeling.

Oscar Daniel Diaz, Armando Astarloa, Aitzol Zuloaga, Jesús Lázaro, Jaime Jimenez

Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

An automatic experimental set-up for robustness analysis of designs implemented on SRAM FPGAS.

Uli Kretzschmar, Armando Astarloa, Jesús Lázaro, Jaime Jimenez, Aitzol Zuloaga

Proceedings of the 2011 International Symposium on System on Chip, 2011

2010

An Autonomous Fault Tolerant System for CAN Communications.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, José Luis Martín

Proceedings of the Trends in Applied Intelligent Systems, 2010

2009

PCIREX: A Fast Prototyping Platform for TMR Dynamically Reconfigurable Systems.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

DNAX-BCU: An Un-clonable Cost-conscious SoPC Implementation for Bus Coupling Units of the European Installation Bus.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, Aitzol Zuloaga, Jaime Jimenez

Proceedings of the 29th IEEE International Conference on Distributed Computing Systems Workshops (ICDCS 2009 Workshops), 2009

AES-Galois Counter Mode Encryption/Decryption FPGA Core for Industrial and Residential Gigabit Ethernet Communications.

Jesús Lázaro, Armando Astarloa, Unai Bidarte, Jaime Jimenez, Aitzol Zuloaga

Proceedings of the Reconfigurable Computing: Architectures, 2009

2008

LL-MAC: A low latency MAC protocol for wireless self-organised networks.

Itziar Marín, Jagoba Arias, E. Arceredillo, Aitzol Zuloaga, Iker Losada, Jon Mabe

Microprocess. Microsystems, 2008

A Novel Technique for Low Latency Data Gathering in Wireless Sensor Networks.

Itziar Marín, Aitzol Zuloaga, Iker Losada

Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

2007

Design of a Master Device for the Multifunction Vehicle Bus.

Jaime Jimenez, José Luis Martín, Unai Bidarte, Armando Astarloa, Aitzol Zuloaga

IEEE Trans. Veh. Technol., 2007

Tornado: A self-reconfiguration control system for core-based multiprocessor CSoPCs.

Armando Astarloa, Aitzol Zuloaga, Unai Bidarte, José Luis Martín, Jesús Lázaro, Jaime Jimenez

J. Syst. Archit., 2007

Hardware architecture for a general regression neural network coprocessor.

Jesús Lázaro, Jagoba Arias, Armando Astarloa, Unai Bidarte, Aitzol Zuloaga

Neurocomputing, 2007

GPS-less location algorithm for wireless sensor networks.

Jagoba Arias, Jesús Lázaro, Aitzol Zuloaga, Jaime Jimenez, Armando Astarloa

Comput. Commun., 2007

2006

Comparison of two designs for the multifunction vehicle bus.

Jaime Jimenez, José Luis Martín, Aitzol Zuloaga, Unai Bidarte, Jagoba Arias

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

SOM Segmentation of gray scale images for optical recognition.

Jesús Lázaro, Jagoba Arias, José Luis Martín, Aitzol Zuloaga, Carlos Cuadrado

Pattern Recognit. Lett., 2006

Node Synchronization in Wireless Sensor Networks.

Jagoba Arias, Eduardo Santos, Itziar Marín, Jaime Jimenez, Jesús Lázaro, Aitzol Zuloaga

Proceedings of the Second International Conference on Wireless and Mobile Communications (ICWMC'06), 2006

2005

Multiprocessor SoPC-Core for FAT volume computation.

Armando Astarloa, Unai Bidarte, Jesús Lázaro, Aitzol Zuloaga, Jagoba Arias

Microprocess. Microsystems, 2005

Hardware implementation of optical flow constraint equation using FPGAs.

José L. Martín-Sánchez, Aitzol Zuloaga, Carlos Cuadrado, Jesús Lázaro, Unai Bidarte

Comput. Vis. Image Underst., 2005

2004

Malguki: an RSSI based ad hoc location algorithm.

Jagoba Arias, Aitzol Zuloaga, Jesús Lázaro, Jon Andreu, Armando Astarloa

Microprocess. Microsystems, 2004

Co-simulation Virtual Platform for Reconfigurable Multiprocessor Hybrid Cores Development.

Armando Astarloa, Jesús Lázaro, Jagoba Arias, Unai Bidarte, Aitzol Zuloaga

Proceedings of the International Conference on Modeling, 2004

Doppler Location Algorithm for Wireless Sensor Networks.

Jagoba Arias, Jesús Lázaro, Aitzol Zuloaga, Jaime Jimenez

Proceedings of the International Conference on Wireless Networks, 2004

A Self-Reconfiguration Framework for Multiprocessor CSoPCs.

Armando Astarloa, Jesús Lázaro, Unai Bidarte, José Luis Martín, Aitzol Zuloaga

Proceedings of the Field Programmable Logic and Application, 2004

2003

Core-Based Reusable Architecture for Slave Circuits with Extensive Data Exchange Requirements.

Unai Bidarte, Armando Astarloa, Aitzol Zuloaga, Jaime Jimenez, Iñigo Martínez de Alegría

Proceedings of the Field Programmable Logic and Application, 13th International Conference, 2003

2001

Software Workbench for Movement Estimation based on Optical Flow Computation.

José Luis Martín, Aitzol Zuloaga, Josu Cruzado

Proceedings of the IASTED International Conference on Visualization, 2001

1998

Hardware Architecture for Optical Flow Estimation in Real Time.

Aitzol Zuloaga, José Luis Martín, Joseba Ezquerra

Proceedings of the 1998 IEEE International Conference on Image Processing, 1998