Aika Kamei

According to our database, Aika Kamei authored at least 6 papers between 2021 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2024

Optimized Two-Step Store Control for MTJ-Based Nonvolatile Flip-Flops to Minimize Store Energy Under Process and Temperature Variations.

Kimiyoshi Usami, Daiki Yokoyama, Aika Kamei, Hideharu Amano, Kenta Suzuki, Keizo Hiraga, Kazuhiro Bessho

IEEE Trans. Very Large Scale Integr. Syst., January, 2024

2023

Power Analysis and Power Modeling of Directly-Connected FPGA Clusters.

Kensuke Iizuka, Haruna Takagi, Aika Kamei, Kazuei Hironaka, Hideharu Amano

IEICE Trans. Inf. Syst., December, 2023

A Variation-Aware MTJ Store Energy Estimation Model for Edge Devices With Verify-and-Retryable Nonvolatile Flip-Flops.

Aika Kamei, Hideharu Amano, Takuya Kojima, Daiki Yokoyama, Kimiyoshi Usami, Keizo Hiraga, Kenta Suzuki, Kazuhiro Bessho

IEEE Trans. Very Large Scale Integr. Syst., April, 2023

2022

Optimal switching time to minimize store energy in MTJ-based flip-flops under process and temperature variations.

Kimiyoshi Usami, Daiki Yokoyama, Aika Kamei, Hideharu Amano

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022

Power Analysis of Directly-connected FPGA Clusters.

Kensuke Iizuka, Haruna Takagi, Aika Kamei, Kazuei Hironaka, Hideharu Amano

Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2022

2021

Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops.

Aika Kamei, Takuya Kojima, Hideharu Amano, Daiki Yokoyama, Hisato Miyauchi, Kimiyoshi Usami, Keizo Hiraga, Kenta Suzuki, Kazuhiro Bessho

Proceedings of the 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2021