Ahsan Raja Chowdhury

According to our database, Ahsan Raja Chowdhury authored at least 27 papers between 2003 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2021

An improved memetic approach for protein structure prediction incorporating maximal hydrophobic core estimation concept.

Rumana Nazmul, Madhu Chetty, Ahsan Raja Chowdhury

Knowl. Based Syst., 2021

2020

Multimodal Memetic Framework for low-resolution protein structure prediction.

Rumana Nazmul, Madhu Chetty, Ahsan Raja Chowdhury

Swarm Evol. Comput., 2020

2018

Alignment-free Cancellable Template Generation for Fingerprint based Authentication.

Rumana Nazmul, Md. Rafiqul Islam, Ahsan Raja Chowdhury

Proceedings of the 4th International Conference on Information Systems Security and Privacy, 2018

2015

Network decomposition based large-scale reverse engineering of gene regulatory network.

Ahsan Raja Chowdhury, Madhu Chetty

Neurocomputing, 2015

On the Analysis of Reversible Booth's Multiplier.

Jakia Sultana, Sajib Kumar Mitra, Ahsan Raja Chowdhury

Proceedings of the 28th International Conference on VLSI Design, 2015

Optimized Logarithmic Barrel Shifter in Reversible Logic Synthesis.

Sajib Kumar Mitra, Ahsan Raja Chowdhury

Proceedings of the 28th International Conference on VLSI Design, 2015

2014

Reconstructing Gene Regulatory Network with Enhanced Particle Swarm Optimization.

Rezwana Sultana, Dilruba Showkat, Mohammad Samiullah, Ahsan Raja Chowdhury

Proceedings of the Neural Information Processing - 21st International Conference, 2014

2013

Incorporating time-delays in S-System model for reverse engineering genetic networks.

Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen

BMC Bioinform., 2013

Design of a Fault Tolerant Reversible Compact Unidirectional Barrel Shifter.

Md. Shamsujjoha, Hafiz Md. Hasan Babu, Lafifa Jamal, Ahsan Raja Chowdhury

Proceedings of the 26th International Conference on VLSI Design and 12th International Conference on Embedded Systems, 2013

Reverse Engineering Genetic Networks with Time-Delayed S-System Model and Pearson Correlation Coefficient.

Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen

Proceedings of the Neural Information Processing - 20th International Conference, 2013

On the Analysis of Time-Delayed Interactions in Genetic Network Using S-System Model.

Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen

Proceedings of the Neural Information Processing - 20th International Conference, 2013

Inferring large scale genetic networks with S-system model.

Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen

Proceedings of the Genetic and Evolutionary Computation Conference, 2013

2012

Minimum Cost Fault Tolerant Adder Circuits in Reversible Logic Synthesis.

Sajib Kumar Mitra, Ahsan Raja Chowdhury

Proceedings of the 25th International Conference on VLSI Design, 2012

On the Reconstruction of Genetic Network from Partial Microarray Data.

Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen

Proceedings of the Neural Information Processing - 19th International Conference, 2012

Adaptive regulatory genes cardinality for reconstructing genetic networks.

Ahsan Raja Chowdhury, Madhu Chetty, Xuan Vinh Nguyen

Proceedings of the IEEE Congress on Evolutionary Computation, 2012

2011

An improved method to infer Gene Regulatory Network using S-System.

Ahsan Raja Chowdhury, Madhu Chetty

Proceedings of the IEEE Congress on Evolutionary Computation, 2011

2010

Human Disease Diagnosis Using a Fuzzy Expert System

Mir Anamul Hasan, Khaja Md. Sher-E-Alam, Ahsan Raja Chowdhury

CoRR, 2010

2008

Efficient approaches for designing reversible Binary Coded Decimal adders.

Ashis Kumer Biswas, Md. Mahmudul Hasan, Ahsan Raja Chowdhury, Hafiz Md. Hasan Babu

Microelectron. J., 2008

A Novel Approach to Design BCD Adder and Carry Skip BCD Adder.

Ashis Kumer Biswas, Md. Mahmudul Hasan, Moshaddek Hasan, Ahsan Raja Chowdhury, Hafiz Md. Hasan Babu

Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Minimization of CTS of k-CNOT Circuits for SSF and MSF Model.

Muhammad Ibrahim, Ahsan Raja Chowdhury, Hafiz Md. Hasan Babu

Proceedings of the 23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 2008

2006

Design of a compact reversible binary coded decimal adder circuit.

Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury

J. Syst. Archit., 2006

A New Approach to Synthesize Multiple-Output Functions Using Reversible Programmable Logic Array.

Ahsan Raja Chowdhury, Rumana Nazmul, Hafiz Md. Hasan Babu

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

Realization of Digital Fuzzy Operations Using Multi-Valued Fredkin Gates.

Amin Ahsan Ali, Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury

Proceedings of the 2006 International Conference on Computer Design & Conference on Computing in Nanotechnology, 2006

2005

Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder.

Hafiz Md. Hasan Babu, Ahsan Raja Chowdhury

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

2004

Synthesis of Full-Adder Circuit Using Reversible Logic.

Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Syed Mostahed Ali Chowdhury, Ahsan Raja Chowdhury

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

A heuristic approach to synthesize Boolean functions using TANT network.

Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Rumana Nazmul, Md. Anwarul Haque, Ahsan Raja Chowdhury

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003

Reversible Logic Synthesis for Minimization of Full-Adder Circuit.

Hafiz Md. Hasan Babu, Md. Rafiqul Islam, Ahsan Raja Chowdhury, Syed Mostahed Ali Chowdhury

Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003