Ahmed Amine Jerraya
According to our database1,
Ahmed Amine Jerraya
authored at least 185 papers
between 1983 and 2019.
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Bibliography
2019
A Scalable and Adaptable ILP-Based Approach for Task Mapping on MPSoC Considering Load Balance and Communication Optimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
2015
ACM Trans. Embed. Comput. Syst., 2015
Design and implementation of a closed-loop controller for a self-adaptive IEEE 802.15.4 DBB.
Proceedings of the IEEE 13th International New Circuits and Systems Conference, 2015
An energy-efficient IEEE 802.15.4 tunable digital baseband targeting self-adaptive WPANs.
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
2014
Proceedings of the IEEE 12th International New Circuits and Systems Conference, 2014
Proceedings of the 9th International Symposium on Communication Systems, 2014
2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
2012
An asynchronous hierarchical router for networks-on-chip-based three-dimensional multi-processor system-on-chip.
Softw. Pract. Exp., 2012
IPSJ Trans. Syst. LSI Des. Methodol., 2012
2011
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Proceedings of the 21st IEEE International Symposium on Rapid System Prototyping, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Convergence of design and fabrication technologies, a key enabler for HW-SW integration.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010
2009
Simulink<sup>®</sup>-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation.
Integr., 2009
High level modelling and performance evaluation of address mapping in NAND flash memory.
Proceedings of the 16th IEEE International Conference on Electronics, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the 14th Asia South Pacific Design Automation Conference, 2009
Proceedings of the Embedded Systems Design and Verification, 2009
2008
ACM Trans. Embed. Comput. Syst., 2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Int. J. Parallel Program., 2008
Proceedings of the 19th IEEE/IFIP International Symposium on Rapid System Prototyping: RSP 2009, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
2007
ACM Trans. Embed. Comput. Syst., 2007
IEEE Des. Test Comput., 2007
IEEE Distributed Syst. Online, 2007
Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC.
Des. Autom. Embed. Syst., 2007
Scheduling with accurate communication delay model and scheduler implementation for multiprocessor system-on-chip.
Des. Autom. Embed. Syst., 2007
Proceedings of the 2007 Summer Computer Simulation Conference, 2007
Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC.
Proceedings of the 10th International Workshop on Software and Compilers for Embedded Systems, 2007
Proceedings of the 13th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2007), 2007
Efficient Software Development Platforms for Multimedia Applications at Different Abstraction Levels.
Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007
Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 44th Design Automation Conference, 2007
Flexible Application Software Generation for Heterogeneous Multi-Processor System-on-Chip.
Proceedings of the 31st Annual International Computer Software and Applications Conference, 2007
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
Flexible and Executable Hardware/Software Interface Modeling for Multiprocessor SoC Design Using SystemC.
Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007
2006
Automatic delay correction method for IP block-based design of VLSI dedicated digital signal processing systems: theoretical foundations and implementation.
IEEE Trans. Very Large Scale Integr. Syst., 2006
ACM Trans. Embed. Comput. Syst., 2006
Macrocell Builder: IP-Block-Based Design Environment for High-Throughput VLSI Dedicated Digital Signal Processing Systems.
EURASIP J. Adv. Signal Process., 2006
Fast Prototyping of POSIX Based Applications on a Multiprocessor SoC Architecture: "Hardware-Dependent Software Oriented Approach".
Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 2006
Service Based Component Design Approach for Flexible Hardware/Software Interface Modeling.
Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 2006
Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application.
Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006
Proceedings of the 43rd Design Automation Conference, 2006
Proceedings of the 43rd Design Automation Conference, 2006
SHAPES: : a tiled scalable software hardware architecture platform for embedded systems.
Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis, 2006
Functional modeling techniques for efficient SW code generation of video codec applications.
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, 2006
2005
Proceedings of the Embedded Systems Handbook., 2005
Méthodes de correction de retard dans les modèles RTL des systèmes monopuces DSP obtenus par assemblage de composants IP : fondement théorique et implémentation.
Tech. Sci. Informatiques, 2005
Conception des interfaces logiciel-matériel pour l'intégration des mémoires globales dans les systèmes monopuces.
Tech. Sci. Informatiques, 2005
Hardware/software codesign of on-chip communication architecture for application-specific multiprocessor system-on-chip.
Int. J. Embed. Syst., 2005
Int. J. Embed. Syst., 2005
Performance Evaluation of a NoC-Based Design for MC-CDMA Telecommunications Using NS-2.
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005
Automatic Generation of Component Wrappers by Composition of Hardware Library Elements Starting from Communication Service Specification.
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005
Proceedings of the EMSOFT 2005, 2005
Service dependency graph: an efficient model for hardware/software interfaces modeling and generation for SoC design.
Proceedings of the 3rd IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2005
IP-block-based design environment for high-throughput VLSI dedicated digital signal processing systems.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Using abstract CPU subsystem simulation model for high level HW/SW architecture exploration.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
Hardware/Software Interfaces Design for SoC.
Proceedings of the Industrial Information Technology Handbook, 2005
2004
Object-based hardware/software component interconnection model for interface design in system-on-a-chip circuits.
J. Syst. Softw., 2004
Strategies for the integration of hardware and software IP components in embedded systems-on-chip.
Integr., 2004
A generic architecture model based-methodology for an efficient design of hardware/software application-specific multiprocessor System-on-Chip.
Ann. des Télécommunications, 2004
Automatic Building of Executable Models from Abstract SoC Architectures Made of Heterogeneous Subsystems.
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004
Network Interface Generation for MPSOC: From Communication Service Requirements to RTL Implementation.
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004
An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor.
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004
Proceedings of the 2004 Euromicro Symposium on Digital Systems Design (DSD 2004), Architectures, Methods and Tools, 31 August, 2004
Multi-Processor SoC Design Methodology Using a Concept of Two-Layer Hardware-Dependent Software.
Proceedings of the 2004 Design, 2004
Proceedings of the 2004 Design, 2004
Proceedings of the 41th Design Automation Conference, 2004
An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory.
Proceedings of the 41th Design Automation Conference, 2004
EuroSoC: towards a joint university/industry research infrastructure for system on chip and system in package.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
Fast and accurate timed execution of high level embedded software using HW/SW interface simulation model.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004
2003
Hot Topics at HLDVT 02.
IEEE Des. Test Comput., 2003
Towards SoC Validation Through Prototyping: A Systematic Approach Based on Reconfigurable Platform.
Des. Autom. Embed. Syst., 2003
An Efficient Methodology and Semi-Automated Flow for Design and Validation of Complex Digital Signal Processing ASICS Macro-Cells.
Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 2003
Proceedings of the 14th IEEE International Workshop on Rapid System Prototyping (RSP 2003), 2003
Definition of a systematic method for the generation of software test programs allowing the functional verification of System On Chip (SoC).
Proceedings of the Fourth International Workshop on Microprocessor Test and Verification, 2003
Proceedings of the 2003 Design, 2003
Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer.
Proceedings of the 2003 Design, 2003
Combining architecture exploration and a path to implementation to build a complete SoC design flow from system specification to RTL.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003
Proceedings of the Embedded Software for SoC, 2003
2002
Tech. Sci. Informatiques, 2002
Tech. Sci. Informatiques, 2002
Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems.
IEEE Trans. Software Eng., 2002
IEEE Des. Test Comput., 2002
Application of Multi-Domain and Multi-Language Cosimulation to an Optical MEM Switch Design.
Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002
Proceedings of the 15th International Symposium on System Synthesis (ISSS 2002), 2002
Proceedings of the Seventh IEEE International High-Level Design Validation and Test Workshop 2002, 2002
Automatic Generation of Fast Timed Simulation Models for Operating Systems in SoC Design.
Proceedings of the 2002 Design, 2002
Proceedings of the 39th Design Automation Conference, 2002
Proceedings of the 39th Design Automation Conference, 2002
2001
Flot de conception flexible pour la synthèse comportementale - Une approche effective pour l'intégration des outils.
Tech. Sci. Informatiques, 2001
Automatic generation and targeting of application-specificoperating systems and embedded systems software.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001
Application-Specific System-on-a-Chip Multiprocessors.
IEEE Des. Test Comput., 2001
Two Enduring Questions for Computer Design.
IEEE Des. Test Comput., 2001
IEEE Des. Test Comput., 2001
Colif: a Multilevel Design Representation for Application-Specific Multiprocessor System-on-Chip Design.
Proceedings of the 12th IEEE International Workshop on Rapid System Prototyping (RSP 2001), 2001
Proceedings of the 14th International Symposium on Systems Synthesis, 2001
Proceedings of the 14th International Symposium on Systems Synthesis, 2001
Automatic Code-Transformation and Architecture Refinement for Application-Specific Multiprocessor SoCs with Shared Memory.
Proceedings of the SOC Design Methodologies, 2001
Fast timed cosimulation of HW/SW implementation of embedded multiprocessor SoC communication.
Proceedings of the Sixth IEEE International High-Level Design Validation and Test Workshop 2001, 2001
A model for describing communication between aggregate objects in the specification and design of embedded systems.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Automatic generation and targeting of application specific operating systems and embedded systems software.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
An efficient architecture model for systematic design of application-specific multiprocessor SoC.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001
Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip.
Proceedings of the 38th Design Automation Conference, 2001
Proceedings of the Ninth International Symposium on Hardware/Software Codesign, 2001
A higher level system communication model for object-oriented specification and design of embedded systems.
Proceedings of ASP-DAC 2001, 2001
Scalable and flexible cosimulation of SoC designs with heterogeneous multi-processor target architectures.
Proceedings of ASP-DAC 2001, 2001
2000
Des. Autom. Embed. Syst., 2000
Cycle-True Simulation of the ST10 Microcontroller Including the Core and the Peripherals.
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), 2000
Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000), 2000
Proceedings of the 13th International Symposium on System Synthesis, 2000
Framework for System Design, Validation and Fast Prototyping of Multiprocessor System-On-Chip.
Proceedings of the Architecture and Design of Distributed Embedded Systems, 2000
Generic Architecture Platform for Multiprocessor System-On-Chip Design.
Proceedings of the Architecture and Design of Distributed Embedded Systems, 2000
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000
Rethinking Behavioral Synthesis for a Better Integration within Existing Design Flows.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000
Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, 2000
Proceedings of the 2000 Design, 2000
Proceedings of ASP-DAC 2000, 2000
1999
Proceedings of the Tenth IEEE International Workshop on Rapid System Prototyping (RSP 1999), 1999
Comparing RTL and Behavioral Design Methodologies in the Case of a 2M-Transistor ATM Shaper.
Proceedings of the 36th Conference on Design Automation, 1999
Proceedings of the Seventh International Workshop on Hardware/Software Codesign, 1999
1998
Integr. Comput. Aided Eng., 1998
Automatic VHDL-C Interface Generation for Distributed Cosimulation: Application to Large Design Examples.
Des. Autom. Embed. Syst., 1998
Proceedings of the Ninth IEEE International Workshop on Rapid System Prototyping (RSP 1998), 1998
MCI- Multilanguage Distributed Co- Simulation Tool.
Proceedings of the Distributed and Parallel Embedded Systems, 1998
Proceedings of the 1998 Design, 1998
Proceedings of the Sixth International Workshop on Hardware/Software Codesign, 1998
1997
Guest Editorial Introduction to the Special Issue on the Eighth IEEE International Symposium on System Synthesis.
IEEE Trans. Very Large Scale Integr. Syst., 1997
IEEE Trans. Very Large Scale Integr. Syst., 1997
Des. Autom. Embed. Syst., 1997
Des. Autom. Embed. Syst., 1997
Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997
ReCode: the design and re-design of the instruction codes for embedded instruction-set processors.
Proceedings of the European Design and Test Conference, 1997
Am Embedded System Case Study: The Firm Ware Development Environment for a Multimedia Audio Processor.
Proceedings of the 34st Conference on Design Automation, 1997
Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997
1996
Microprocess. Microsystems, 1996
Automatic generation of interfaces for distributed C-VHDL cosimulation of embedded systems: an industrial experience.
Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996
Proceedings of the conference on European design automation, 1996
Design of an adaptive motors controller based on fuzzy logic using behavioral synthesis.
Proceedings of the conference on European design automation, 1996
Exploration of hardware/software design space through a codesign of robot arm controller.
Proceedings of the conference on European design automation, 1996
Proceedings of the 1996 European Design and Test Conference, 1996
Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures.
Proceedings of the 33st Conference on Design Automation, 1996
Proceedings of the 33st Conference on Design Automation, 1996
1995
Proceedings of the Sixth IEEE International Workshop on Rapid System Prototyping (RSP '95), 1995
Industrial experience using rule-driven retargetable code generation for multimedia applications.
Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), 1995
Proceedings of the 8th International Symposium on System Synthesis (ISSS 1995), 1995
Composing ActivityCharts/StateCharts, SDL and SAO specifications for codesign in avionics.
Proceedings of the Proceedings EURO-DAC'95, 1995
Proceedings of the Proceedings EURO-DAC'95, 1995
Proceedings of the Proceedings EURO-DAC'95, 1995
A unified model for co-simulation and co-synthesis of mixed hardware/software systems.
Proceedings of the 1995 European Design and Test Conference, 1995
Proceedings of the 1995 European Design and Test Conference, 1995
1994
Parallel Process. Lett., 1994
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994
Proceedings of IEEE 5th International Workshop on Rapid System Prototyping, 1994
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994
Proceedings of the 31st Conference on Design Automation, 1994
Proceedings of the Third International Workshop on Hardware/Software Codesign, 1994
Proceedings of the Third International Workshop on Hardware/Software Codesign, 1994
1993
Proceedings of the European Design Automation Conference 1993, 1993
Linking System Design Tools and Hardware Design Tools.
Proceedings of the Computer Hardware Description Languages and their Applications, Proceedings of the 11th IFIP WG10.2 International Conference on Computer Hardware Description Languages and their Applications, 1993
1992
Proceedings of the Fifth International Conference on VLSI Design, 1992
AMICAL: Architectural Synthesis based on VHDL.
Proceedings of the Synthesis for Control Dominated Circuits, 1992
1991
Microprocess. Microsystems, 1991
Meta VHDL for Higher Level Controller Modeling and Synthesis.
Proceedings of the VLSI 91, 1991
1990
Proceedings of the European Design Automation Conference, 1990
1989
Contribution à la compilation de silicium et au compilateur SYCO. (Silicon compilation and the syco silicon compiler).
PhD thesis, 1989
1988
Proceedings of the Computer Design: VLSI in Computers and Processors, 1988
1986
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986
1983
PhD thesis, 1983