Ahmad Tarraf

Orcid: 0000-0002-9174-5598

According to our database1, Ahmad Tarraf authored at least 14 papers between 2019 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Malleability in Modern HPC Systems: Current Experiences, Challenges, and Future Opportunities.
IEEE Trans. Parallel Distributed Syst., September, 2024

Capturing Periodic I/O Using Frequency Techniques.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2024

I/O Behind the Scenes: Bandwidth Requirements of HPC Applications with Asynchronous I/O.
Proceedings of the IEEE International Conference on Cluster Computing, 2024

2023
FTIO: Detecting I/O Periodicity Using Frequency Techniques.
CoRR, 2023

Towards Smarter Schedulers: Molding Jobs into the Right Shape via Monitoring and Modeling.
Proceedings of the High Performance Computing, 2023

2022
Conquering Noise With Hardware Counters on HPC Systems.
Proceedings of the IEEE/ACM Workshop on Programming and Performance Visualization Tools, 2022

2021
Formal abstraction and verification of analog circuits
PhD thesis, 2021

Towards Compositional Abstraction of Analog Neuronal Networks.
Proceedings of the 11th IEEE Annual Computing and Communication Workshop and Conference, 2021

2020
From transistor level to cyber physical/hybrid systems: Formal verification using automatic compositional abstraction.
it Inf. Technol., 2020

Equivalence Checking Methods for Analog Circuits Using Continuous Reachable Sets.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

Establishing Reachset Conformance for the Formal Analysis of Analog Circuits.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Automatic Modeling of Transistor Level Circuits by Hybrid Systems with Parameter Variable Matrices.
Proceedings of the 16th International Conference on Synthesis, 2019

Multi-agent Learning for Energy-Aware Placement of Autonomous Vehicles.
Proceedings of the 18th IEEE International Conference On Machine Learning And Applications, 2019

Behavioral Modeling of Transistor-Level Circuits using Automatic Abstraction to Hybrid Automata.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019


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