Ahmad Patooghy

Orcid: 0000-0003-2647-2797

According to our database1, Ahmad Patooghy authored at least 95 papers between 2006 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Trojan playground: a reinforcement learning framework for hardware Trojan insertion and detection.
J. Supercomput., July, 2024

Cluster-BPI: Efficient Fine-Grain Blind Power Identification for Defending against Hardware Thermal Trojans in Multicore SoCs.
CoRR, 2024

TrojanForge: Adversarial Hardware Trojan Examples with Reinforcement Learning.
CoRR, 2024

The Seeker's Dilemma: Realistic Formulation and Benchmarking for Hardware Trojan Detection.
CoRR, 2024

CG-CNN: Self-Supervised Feature Extraction Through Contextual Guidance and Transfer Learning.
IEEE Access, 2024

Leveraging Machine Learning for Wi-Fi-Based Environmental Continuous Two-Factor Authentication.
IEEE Access, 2024

TrojanForge: Generating Adversarial Hardware Trojan Examples Using Reinforcement Learning.
Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD, 2024

Advancing IoT Security Through Run-time Monitoring & Post-Execution Verification.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2024

Thermo-Attack Resiliency: Addressing a New Vulnerability in Opto-Electrical Network-on-Chips.
Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

2023
Securing Network-on-chips Against Fault-injection and Crypto-analysis Attacks via Stochastic Anonymous Routing.
ACM J. Emerg. Technol. Comput. Syst., July, 2023

Securing IoT-Based Healthcare Systems Against Malicious and Benign Congestion.
IEEE Internet Things J., July, 2023

Correction to: ReNo: novel switch architecture for reliability improvement of NoCs.
J. Supercomput., March, 2023

ReNo: novel switch architecture for reliability improvement of NoCs.
J. Supercomput., 2023

Addressing Benign and Malicious Crosstalk in Modern System-on-Chips.
IEEE Access, 2023

Multi-Criteria Hardware Trojan Detection: A Reinforcement Learning Approach.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

On the Trustworthiness of FHIR-Based Intemet-of-Things Digital Health Systems.
Proceedings of the 66th IEEE International Midwest Symposium on Circuits and Systems, 2023

Tactile Sensing with Contextually Guided CNNs: A Semisupervised Approach for Texture Classification.
Proceedings of the Seventh IEEE International Conference on Robotic Computing, 2023

2022
VibTac-12: Texture Dataset Collected by Tactile Sensors.
Dataset, May, 2022

Route Packets Uneven, Consume Energy Even: A Lifetime Expanding Routing Algorithm for WSNs.
Wirel. Pers. Commun., 2022

A multi-application approach for synthesizing custom network-on-chips.
J. Supercomput., 2022

MagCiM: A Flexible and Non-Volatile Computing-in-Memory Processor for Energy-Efficient Logic Computation.
IEEE Access, 2022

BIC: Blind Identification Countermeasure for Malicious Thermal Sensor Attacks in Mobile SoCs.
Proceedings of the 23rd International Symposium on Quality Electronic Design, 2022

Hardware Trojan Insertion Using Reinforcement Learning.
Proceedings of the GLSVLSI '22: Great Lakes Symposium on VLSI 2022, Irvine CA USA, June 6, 2022

Blockchain-based Smart Supply Chain Management.
Proceedings of the 9th International Conference on Dependable Systems and Their Applications, 2022

2021
Novel flexible buffering architectures for 3D-NoCs.
Sustain. Comput. Informatics Syst., 2021

An energy efficient synthesis flow for application specific SoC design.
Integr., 2021

Joint security and performance improvement in multilevel shared caches.
IET Inf. Secur., 2021

A Survey on the Security of Wired, Wireless, and 3D Network-on-Chips.
IEEE Access, 2021

Securing network-on-chips via novel anonymous routing.
Proceedings of the NOCS '21: International Symposium on Networks-on-Chip, 2021

A Solo-Checkpointing Co-Recovery Mechanism for Reliability Improvement of Cyber-Physical Systems.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Eco-CMB: A Hardware-Accelerated Band-Power Feature Extractor for Tactile Embedded Systems.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

Reliability Assessment of Tiny Machine Learning Algorithms in the Presence of Control Flow Errors.
Proceedings of the 64th IEEE International Midwest Symposium on Circuits and Systems, 2021

A Vision-based Framework for Intersection Monitoring and Signal Evaluation.
Proceedings of the IEEE International Smart Cities Conference, 2021

Securing on-Chip Communications: An On-The-Fly Encryption Architecture for SoCs.
Proceedings of the International Conference on Computational Science and Computational Intelligence, 2021

2020
Addressing a New Class of Reliability Threats in 3-D Network-on-Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

Lifetime expansion in WSNs using mobile data collector: A learning automata approach.
J. King Saud Univ. Comput. Inf. Sci., 2020

Scan-based attack tolerance with minimum testability loss: a gate-level approach.
IET Inf. Secur., 2020

An Embedded System for Collection and Real-Time Classification of a Tactile Dataset.
IEEE Access, 2020

SiMple: A Unified Single and Multi-Path Routing Algorithm for Wireless Sensor Networks With Source Location Privacy.
IEEE Access, 2020

Mist-Scan: A Secure Scan Chain Architecture to Resist Scan-Based Attacks in Cryptographic Chips.
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020

Data-Triggered Approach for Real-Time Machine Learning in IoT Systems.
Proceedings of the 63rd IEEE International Midwest Symposium on Circuits and Systems, 2020

Enduring Non-Volatile L1 Cache Using Low-Retention-Time STTRAM Cells.
Proceedings of the 2020 IEEE Computer Society Annual Symposium on VLSI, 2020

Application of Unmanned Aerial Vehicles in Smart Cities using Computer Vision Techniques.
Proceedings of the IEEE International Smart Cities Conference, 2020

2019
ON-OFF: a reactive routing algorithm for dynamic thermal management in 3D NoCs.
IET Comput. Digit. Tech., 2019

An Efficient Technique to Detect Stealthy Hardware Trojans Independent of the Trigger Size.
J. Electron. Test., 2019

3DEP: A Efficient Routing Algorithm to Evenly Distribute Traffic Over 3D Network-on-Chips.
Proceedings of the 27th Euromicro International Conference on Parallel, 2019

RaceR: A Thread Mapping Algorithm for Race Reduction in Multi-Level Shared Caches.
Proceedings of the 27th Euromicro International Conference on Parallel, 2019

A New Hardware Accelerator for Data Sorting in Area & Energy Constrained Architectures.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

FasTest: A Concurrent Strategy to Test Components of 3D Network-on-Chips.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

Your hardware is all wired up!: attacking network-on-chips via crosstalk channel.
Proceedings of the 12th International Workshop on Network on Chip Architectures, 2019

2018
An Efficient Programming Skeleton for Clusters of Multi-Core Processors.
Int. J. Parallel Program., 2018

Vulnerability modelling of crypto-chips against scan-based attacks.
IET Inf. Secur., 2018

Circuit enclaves susceptible to hardware Trojans insertion at gate-level designs.
IET Comput. Digit. Tech., 2018

PAT-Noxim: A Precise Power & Thermal Cycle-Accurate NoC Simulator.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

Mystic: Mystifying IP Cores Using an Always-ON FSM Obfuscation Method.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Application Specific Networks-on-Chip Synthesis: An Energy Efficient Approach.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

2017
Fault-tolerant routing methodology for hypercube and cube-connected cycles interconnection networks.
J. Supercomput., 2017

Side channel parameter characteristics of code injection attacks.
ISC Int. J. Inf. Secur., 2017

Micro-architectural approach to the efficient employment of STTRAM cells in a microprocessor register file.
IET Comput. Digit. Tech., 2017

3D-AMAP: A Latency-Aware Task Mapping onto 3D Mesh-Based NoCs with Partially-Filled TSVs.
Proceedings of the 25th Euromicro International Conference on Parallel, 2017

Advertiser elevator: A fault tolerant routing algorithm for partially connected 3D Network-on-Chips.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Janus: An uncertain cache architecture to cope with side channel attacks.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Crosstalk Free Coding Systems to Protect NoC Channels against Crosstalk Faults.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017

2016
Reliability-oriented scheduling for static-priority real-time tasks in standby-sparing systems.
Microprocess. Microsystems, 2016

Unauthenticated event detection in wireless sensor networks using sensors co-coverage.
ISC Int. J. Inf. Secur., 2016

Phase Change Memory lifetime enhancement via online data swapping.
Integr., 2016

Performance/energy aware task migration algorithm for many-core chips.
IET Comput. Digit. Tech., 2016

AMAP: a new heuristic communication-aware tasks mapping onto 2D mesh NoCs.
Proceedings of the 24th High Performance Computing Symposium, 2016

Hardware enlightening: No where to hide your Hardware Trojans!
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

CirKet: A Performance Efficient Hybrid Switching Mechanism for NoC Architectures.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015
An Efficient Data Aggregation Method for Event-Driven WSNs: A Modeling and Evaluation Approach.
Wirel. Pers. Commun., 2015

Analytical performance modeling of de Bruijn inspired mesh-based network-on-chips.
Microprocess. Microsystems, 2015

2014
Coding Last Level STT-RAM Cache for High Endurance and Low Power.
IEEE Comput. Archit. Lett., 2014

2013
Bee-MMT: A load balancing method for power consumption management in cloud computing.
Proceedings of the Sixth International Conference on Contemporary Computing, 2013

OLDA: An Efficient On-Line Data Aggregation Method for Wireless Sensor Networks.
Proceedings of the 2013 Eighth International Conference on Broadband and Wireless Computing, 2013

2011
A reliable and power efficient flow-control method to eliminate crosstalk faults in network-on-chips.
Microprocess. Microsystems, 2011

Numeral-Based Crosstalk Avoidance Coding to Reliable NoC Design.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011

2010
Complement routing: A methodology to design reliable routing algorithm for Network on Chips.
Microprocess. Microsystems, 2010

A low-overhead and reliable switch architecture for Network-on-Chips.
Integr., 2010

FiRot: An Efficient Crosstalk Mitigation Method for Network-on-Chips.
Proceedings of the 16th IEEE Pacific Rim International Symposium on Dependable Computing, 2010

Crosstalk modeling to predict channel delay in Network-on-Chips.
Proceedings of the 28th International Conference on Computer Design, 2010

An Efficient Method to Reliable Data Transmission in Network-on-Chips.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

2009
Low energy single event upset/single event transient-tolerant latch for deep subMicron technologies.
IET Comput. Digit. Tech., 2009

XYX: A Power & Performance Efficient Fault-Tolerant Routing Algorithm for Network on Chip.
Proceedings of the 17th Euromicro International Conference on Parallel, 2009

2008
An accurate mathematical performance model of partially adaptive routing in binary n-cube multiprocessors.
Math. Comput. Model., 2008

2007
Comparative analytical performance evaluation of adaptivity in wormhole-switched hypercubes.
Simul. Model. Pract. Theory, 2007

A Low-Power and SEU-Tolerant Switch Architecture for Network on Chips.
Proceedings of the 13th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC 2007), 2007

Performance Modelling of Necklace Hypercubes.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Reducing Power Consumption in NoC Design with no Effect on Performance and Reliability.
Proceedings of the 14th IEEE International Conference on Electronics, 2007

Feedback Redundancy: A Power Efficient SEU-Tolerant Latch Design for Deep Sub-Micron Technologies.
Proceedings of the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2007

2006
Analytical performance modelling of partially adaptive routing in wormhole hypercubes.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Analytical Performance Comparison of Deterministic, Partially- and Fully-Adaptive Routing Algorithms in Binary n-Cubes.
Proceedings of the 12th International Conference on Parallel and Distributed Systems, 2006

A Solution to Single Point of Failure Using Voter Replication and Disagreement Detection.
Proceedings of the Second International Symposium on Dependable Autonomic and Secure Computing (DASC 2006), 29 September, 2006

Analytic Modeling of Channel Traffic in <i>n</i>-Cubes.
Proceedings of the Computer Science, 2006

Performance Comparison of Partially Adaptive Routing Algorithms.
Proceedings of the 20th International Conference on Advanced Information Networking and Applications (AINA 2006), 2006


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