Ahish Mysore Somashekar
Orcid: 0000-0002-5374-5239
According to our database1,
Ahish Mysore Somashekar
authored at least 7 papers
between 2012 and 2017.
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Collaborative distances:
Timeline
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2017
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Book In proceedings Article PhD thesis Dataset OtherLinks
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Bibliography
2017
Diagnosis of Performance Limiting Segments in Integrated Circuits Using Path Delay Measurements.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017
2016
Non-enumerative Generation of Path Delay Distributions and Its Application to Critical Path Selection.
ACM Trans. Design Autom. Electr. Syst., 2016
2015
Proceedings of the 33rd IEEE International Conference on Computer Design, 2015
2014
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014
2013
Diagnosis of small delay defects arising due to manufacturing imperfections using path delay measurements.
Proceedings of the International Symposium on Quality Electronic Design, 2013
2012
Proceedings of the 30th International IEEE Conference on Computer Design, 2012