Agustin C. Galetto

Orcid: 0000-0001-6079-2175

According to our database¹, Agustin C. Galetto authored at least 8 papers between 2018 and 2023.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

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2023

Digital Background Compensation of Analog Impairments in Jointly Frequency-Time Interleaved DACs.

[BibT_eX]

[DOI]

IEEE Access, 2023

2022

Backpropagation Based Background Compensation of TI-DAC Errors in High-Speed Transmitters.

[BibT_eX]

[DOI]

Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

2021

A 4GS/s 8-bit time-interleaved SAR ADC with an energy-efficient architecture in 130 nm CMOS.

[BibT_eX]

[DOI]

Fredy Solis

Álvaro Fernandez Bocco

Int. J. Circuit Theory Appl., 2021

Adaptive Background Compensation of Frequency Interleaved DACs With Application to Coherent Optical Transceivers.

[BibT_eX]

[DOI]

IEEE Access, 2021

Background Compensation of Frequency Interleaved DAC for Optical Transceivers.

[BibT_eX]

[DOI]

Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021

2020

Backpropagation-Based Background Compensation of Frequency Interleaved ADC for Coherent Optical Receivers.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019

An Energy-Efficient Hierarchical Architecture for Time-Interleaved SAR ADC.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., 2019

2018

An 8-bit 3.2GS/S CMOS time-interleaved SAR ADC with non-buffered input demultiplexing.

[BibT_eX]

[DOI]

Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018

Agustin C. Galetto

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