Afshin Abdollahi

According to our database1, Afshin Abdollahi authored at least 16 papers between 2002 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2013
Reversible logic synthesis by quantum rotation gates.
Quantum Inf. Comput., 2013

2010
Cost aware fault tolerant logic synthesis in presence of soft errors.
Proceedings of the 20th ACM Great Lakes Symposium on VLSI 2009, 2010

2009
Adaptive leakage control on body biasing for reducing power consumption in CMOS VLSI circuit.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

2008
Symmetry Detection and Boolean Matching Utilizing a Signature-Based Canonical Form of Boolean Functions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Signature based Boolean matching in the presence of don't cares.
Proceedings of the 45th Design Automation Conference, 2008

2007
A Robust Power Gating Structure and Power Mode Transition Strategy for MTCMOS Design.
IEEE Trans. Very Large Scale Integr. Syst., 2007

Probabilistic decision diagrams for exact probabilistic analysis.
Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

2006
Analysis and synthesis of quantum circuits by using quantum decision diagrams.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Analysis and Optimization of Static Power Considering Transition Dependency of Leakage Current in VLSI Circuits.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

A new canonical form for fast boolean matching in logic synthesis and verification.
Proceedings of the 42nd Design Automation Conference, 2005

An effective power mode transition technique in MTCMOS circuits.
Proceedings of the 42nd Design Automation Conference, 2005

2004
Leakage current reduction in CMOS VLSI circuits by input vector control.
IEEE Trans. Very Large Scale Integr. Syst., 2004

2003
Leakage Current Reduction in Sequential Circuits by Modifying the Scan Chains.
Proceedings of the 4th International Symposium on Quality of Electronic Design (ISQED 2003), 2003

Precomputation-based Guarding for Dynamic and Leakage Power Reduction.
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

2002
Runtime Mechanisms for Leakage Current Reduction in CMOS VLSI Circuits.
Proceedings of the 11th IEEE/ACM International Workshop on Logic & Synthesis, 2002

Runtime mechanisms for leakage current reduction in CMOS VLSI circuits<sup>1, 2</sup>.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002


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