Adwin H. Timmer

According to our database, Adwin H. Timmer authored at least 18 papers between 1993 and 2002.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of five.

2002

A Heterogeneous Multiprocessor Architecture for Flexible Media Processing.

Martijn J. Rutten, Jos T. J. van Eijndhoven, Egbert G. T. Jaspers, Pieter van der Wolf, Evert-Jan D. Pol, Om Prakash Gangwal, Adwin H. Timmer

IEEE Des. Test Comput., 2002

Eclipse: Heterogeneous Multiprocessor Architecture for Flexible Media Processing.

Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol, Egbert G. T. Jaspers, Pieter van der Wolf, Om Prakash Gangwal, Adwin H. Timmer

Proceedings of the 16th International Parallel and Distributed Processing Symposium (IPDPS 2002), 2002

2000

Heterogeneous multiprocessor for the management of real-time video and graphics streams.

Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Gert-Jan van Rootselaar

IEEE J. Solid State Circuits, 2000

Prophid: A Platform-Based Design Method.

Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess

Des. Autom. Embed. Syst., 2000

Memory Arbitration and Cache Management in Stream-Based Systems.

Françoise Harmsze, Adwin H. Timmer, Jef L. van Meerbergen

Proceedings of the 2000 Design, 2000

1999

A video display processing platform for future TV concepts.

Peter H. N. de With, Egbert G. T. Jaspers, Jef L. van Meerbergen, Adwin H. Timmer, Marino T. J. Strik

IEEE Trans. Consumer Electron., 1999

Constraint analysis for DSP code generation.

Bart Mesman, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

Identification and Exploitation of Symmetries in DSP Algorithms.

C. A. J. van Eijk, E. T. A. F. Jacobs, Bart Mesman, Adwin H. Timmer

Proceedings of the 1999 Design, 1999

1998

A Constraint Driven Approach to Loop Pipelining and Register Binding.

Bart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess

Proceedings of the 1998 Design, 1998

Stream Communication between Real-Time Tasks in a High-Performance Multiprocessor.

Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the 1998 Design, 1998

1997

Constraint Analysis for DSP Code Generation.

Bart Mesman, Marino T. J. Strik, Adwin H. Timmer, Jef L. van Meerbergen, Jochen A. G. Jess

Proceedings of the 10th International Symposium on System Synthesis, 1997

PROPHID: A Heterogeneous Multi-Processor Architecture for Multimedia.

Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

PROPHID: a data-driven multi-processor architecture for high-performance DSP.

Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the European Design and Test Conference, 1997

1995

Exact scheduling strategies based on bipartite graph matching.

Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the 1995 European Design and Test Conference, 1995

Efficient code generation for in-house DSP-cores.

Marino T. J. Strik, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess, Stefaan Note

Proceedings of the 1995 European Design and Test Conference, 1995

Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores.

Adwin H. Timmer, Marino T. J. Strik, Jef L. van Meerbergen, Jochen A. G. Jess

Proceedings of the 32st Conference on Design Automation, 1995

1994

NEAT: An Object Oriented High-Level Synthesis Interface.

M. J. M. Heijiligers, H. A. Hilderink, Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993

Execution interval analysis under resource constraints.

Adwin H. Timmer, Jochen A. G. Jess

Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993