Adrien Prost-Boucle

Orcid: 0000-0002-2444-1412

According to our database1, Adrien Prost-Boucle authored at least 11 papers between 2013 and 2019.

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Bibliography

2019
Efficient Decompression of Binary Encoded Balanced Ternary Sequences.
IEEE Trans. Very Large Scale Integr. Syst., 2019

2018
High-Efficiency Convolutional Ternary Neural Networks with Custom Adder Trees and Weight Compression.
ACM Trans. Reconfigurable Technol. Syst., 2018

Overview of the state of the art in embedded machine learning.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2017
Efficient and Versatile FPGA Acceleration of Support Counting for Stream Mining of Sequences and Frequent Itemsets.
ACM Trans. Reconfigurable Technol. Syst., 2017

Ternary neural networks for resource-efficient AI applications.
Proceedings of the 2017 International Joint Conference on Neural Networks, 2017

Scalable high-performance architecture for convolutional ternary neural networks on FPGA.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
Ternary Neural Networks for Resource-Efficient AI Applications.
CoRR, 2016

On-board non-regression test of HLS tools targeting FPGA.
Proceedings of the 2016 International Symposium on Rapid System Prototyping, 2016

HLS-Based Methodology for Fast Iterative Development Applied to Elliptic Curve Arithmetic.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2014
Fast and standalone Design Space Exploration for High-Level Synthesis under resource constraints.
J. Syst. Archit., 2014

2013
A Fast and Autonomous HLS Methodology for Hardware Accelerator Generation under Resource Constraints.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013


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