Aditya Sankar Medury
Orcid: 0000-0002-4961-3188
According to our database1,
Aditya Sankar Medury
authored at least 9 papers
between 2005 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
Engineering negative capacitance Fully Depleted Silicon-on-insulator FET for improved performance.
Microelectron. J., October, 2023
Analysis and Mitigation of Negative Differential Resistance effects in Double-Gate Silicon-on-Insulator Negative Capacitance Field Effect Transistor with improved analog performance.
Microelectron. J., 2023
2022
FE/PE/DE gate stack enabling improved analog performance in partially Junction-less NCFETs.
Microelectron. J., 2022
2018
2016
Impact of carrier quantum confinement on the short channel effects of double-gate silicon-on-insulator FINFETs.
Microelectron. J., 2016
2015
Identification and estimation of latent group-level-effects in infrastructure performance modeling.
EURO J. Transp. Logist., 2015
Proceedings of the ESSCIRC Conference 2015, 2015
2013
PhD thesis, 2013
2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005